A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor. - Shunichi Sukegawa; Taku Umebayashi; Tsutomu Nakajima; Hiroshi Kawanobe; Ken Koseki; Isao Hirota; Tsutomu Haruta; Masanori Kasai; Koji Fukumoto; Toshifumi Wakano; Keishi Inoue; Hiroshi Takahashi; et al. (ISSCC, 2013)

4.6 A 1/2.3inch 20Mpixel 3-layer stacked CMOS Image Sensor with DRAM. - Tsutomu Haruta; Tsutomu Nakajima; Jun Hashizume; Taku Umebayashi; Hiroshi Takahashi; Kazuo Taniguchi; Masami Kuroda; Hiroshi Sumihiro; Koji Enoki; Takatsugu Yamasaki; Katsuya Ikezawa; Atsushi Kitahara; et al. (ISSCC, 2017)

High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory Application. - Jun Okuno; Takafumi Kunihiro; Kenta Konishi; Hideki Maemura; Yusuke Shuto; Fumitaka Sugaya; Monica Materano; Tarek Ali; Maximilian Lederer; Kati Kühnel; Konrad Seidel; Uwe Schroeder; et al. (IMW, 2021)

Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications. - Daisuke Saito; Toshiyuki Kobayashi; Hiroki Koga; Nicolo Ronchi; Kaustuv Banerjee; Yusuke Shuto; Jun Okuno; Kenta Konishi; Luca Di Piazza; Arindam Mallik; Jan Van Houdt; Masanori Tsukamoto; et al. (VLSI Circuits, 2021)

A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing. - Kenta Suzuki; Keizo Hiraga; Kazuhiro Bessho; Kimiyoshi Usami; Taku Umebayashi (VLSI Technology and Circuits, 2023)

HZO-based Nonvolatile SRAM Array with 100% Bit Recall Yield and Sufficient Retention Time at 85°C. - Yusuke Shuto; Jun Okuno; Tsubasa Yonai; Ryo Ono; Peter Reinig; Maximilian Lederer; Konrad Seidel; Ruben Alcala; Thomas Mikolajick; Uwe Schroeder; Taku Umebayashi; Kentaro Akiyama (VLSI Technology and Circuits, 2024)