Scented Envelopment and ERP Basis Waves. - Yasuhiko Saito; Takuji Yamamoto; S. Kanamura (J. Robotics Mechatronics, 1991)

High-Speed Si-Bipolar IC Design for Multi-GB/s Optical Receivers. - Hiroshi Hamano; Takuji Yamamoto; Yoshinori Nishizawa; Akinori Tahara; Norihito Miyoshi; Kouichi Suzuki; Akihito Nishimura (IEEE J. Sel. Areas Commun., 1991)

Development of a semi self-contained wall climbing robot with scanning type suction cups. - Tomoaki Yano; Tomohiro Suwa; Masato Murakami; Takuji Yamamoto (IROS, 1997)

A Passive UHF RFID Tag LSI with 36.6% Efficiency CMOS-Only Rectifier and Current-Mode Demodulator in 0.35µm FeRAM Technology. - Hiroyuki Nakamoto; Daisuke Yamazaki; Takuji Yamamoto; Hajime Kurata; Satoshi Yamada; Kenji Mukaida; Tsuzumi Ninomiya; Takashi Ohkawa; Shoichi Masui; Kunihiko Gotoh (ISSCC, 2006)

A Passive UHF RF Identification CMOS Tag IC Using Ferroelectric RAM in 0.35-µm Technology. - Hiroyuki Nakamoto; Daisuke Yamazaki; Takuji Yamamoto; Hajime Kurata; Satoshi Yamada; Kenji Mukaida; Tsuzumi Ninomiya; Takashi Ohkawa; Shoichi Masui; Kunihiko Gotoh (IEEE J. Solid State Circuits, 2007)

A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (CICC, 2008)

Trends and Challenges in Optical Communications Front-End. - Yuriy M. Greshishchev; Takuji Yamamoto; Naresh R. Shanbhag (ISSCC, 2008)

A single-40Gb/s dual-20Gb/s serializer IC with SFI-5.2 interface in 65nm CMOS. - Kouichi Kanda; Hirotaka Tamura; Takuji Yamamoto; Satoshi Matsubara; Masaya Kibune; Yoshiyasu Doi; Takayuki Shibasaki; Nestoras Tzartzanis; Anders Kristensson; Samir Parikh; Satoshi Ide; Yukito Tsunoda; et al. (ISSCC, 2009)

A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS. - Kouichi Kanda; Hirotaka Tamura; Takuji Yamamoto; Satoshi Matsubara; Masaya Kibune; Yoshiyasu Doi; Takayuki Shibasaki; Nestoras Tzartzanis; Anders Kristensson; Samir Parikh; Satoshi Ide; Yukito Tsunoda; et al. (IEEE J. Solid State Circuits, 2009)

A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2009)

A 60-GHz 1.65mW 25.9% locking range multi-order LC oscillator based injection locked frequency divider in 65nm CMOS. - Keita Takatsu; Hirotaka Tamura; Takuji Yamamoto; Yoshiyasu Doi; Kouichi Kanda; Takayuki Shibasaki; Tadahiro Kuroda (CICC, 2010)

Transceiver circuits for optical communications. - Yuriy M. Greshishchev; Franz Dielacher; Michael Flynn; Donhee Ham; Naresh R. Shanbhag; Takuji Yamamoto (ISSCC, 2010)

A fractional-sampling-rate ADC-based CDR with feedforward architecture in 65nm CMOS. - Oleksiy Tyshchenko; Ali Sheikholeslami; Hirotaka Tamura; Yasumoto Tomita; Hisakatsu Yamaguchi; Masaya Kibune; Takuji Yamamoto (ISSCC, 2010)

A 3 Watt 39.8-44.6 Gb/s Dual-Mode SFI5.2 SerDes Chip Set in 65 nm CMOS. - Nikola Nedovic; Anders Kristensson; Samir Parikh; Subodh M. Reddy; Scott McLeod; Nestoras Tzartzanis; Kouichi Kanda; Takuji Yamamoto; Satoshi Matsubara; Masaya Kibune; Yoshiyasu Doi; Satoshi Ide; et al. (IEEE J. Solid State Circuits, 2010)

High-speed transceivers: Standards, challenges, and future. - Ali Sheikholeslami; Franz Dielacher; Miki Moyal; Jafar Savoj; John T. Stonick; Takuji Yamamoto (ISSCC, 2011)

A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range. - Keita Takatsu; Hirotaka Tamura; Takuji Yamamoto; Yoshiyasu Doi; Kouichi Kanda; Takayuki Shibasaki; Tadahiro Kuroda (IEICE Trans. Electron., 2011)

32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS. - Yoshiyasu Doi; Takayuki Shibasaki; Takumi Danjo; Win Chaivipas; Takushi Hashida; Hiroki Miyaoka; Masanori Hoshino; Yoichi Koyanagi; Takuji Yamamoto; Sanroku Tsukamoto; Hirotaka Tamura (ISSCC, 2013)

A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. - Yoshiyasu Doi; Takayuki Shibasaki; Takumi Danjo; Win Chaivipas; Takushi Hashida; Hiroki Miyaoka; Masanori Hoshino; Yoichi Koyanagi; Takuji Yamamoto; Sanroku Tsukamoto; Hirotaka Tamura (IEEE J. Solid State Circuits, 2013)

A DC-46Gb/s 2: 1 multiplexer and source-series terminated driver in 20nm CMOS technology. - Jian Hong Jiang; Samir Parikh; Mark Lionbarger; Nikola Nedovic; Takuji Yamamoto (A-SSCC, 2014)

In-Line Measurement of Water Content in Ethanol Using a PVA-Coated Quartz Crystal Microbalance. - Byoung Chul Kim; Takuji Yamamoto; Young Han Kim (Sensors, 2014)

22.2 A 25Gb/s hybrid integrated silicon photonic transceiver in 28nm CMOS and SOI. - Yanfei Chen; Masaya Kibune; Asako Toda; Akinori Hayakawa; Tomoyuki Akiyama; Shigeaki Sekiguchi; Hiroji Ebe; Nobuhiro Imaizumi; Tomoyuki Akahoshi; Suguru Akiyama; Shinsuke Tanaka; Takasi Simoyama; et al. (ISSCC, 2015)

A 25 Gbps silicon photonic transmitter and receiver with a bridge structure for CPU interconnects. - Akinori Hayakawa; Masaya Kibune; Asako Toda; Shinsuke Tanaka; Takasi Simoyama; Yanfei Chen; Tomoyuki Akiyama; Shigekazu Okumura; Takeshi Baba; Tomoyuki Akahoshi; Seiji Ueno; Kazunori Maruyama; et al. (OFC, 2015)

In-Line Measurement of Water Contents in Ethanol Using a Zeolite-Coated Quartz Crystal Microbalance. - Byoung Chul Kim; Takuji Yamamoto; Young Han Kim (Sensors, 2015)

Acceleration of Structural Analysis Simulations using CNN-based Auto-Tuning of Solver Tolerance. - Amir Haderbache; Koichi Shirahata; Takuji Yamamoto; Yasumoto Tomita; Hiroshi Okuda (IPDPS Workshops, 2020)

Time-Series Data Regression Modeling Method for Efficient Operation of Virtual Environments. - Yuriko Takahashi; Shigeto Suzuki; Takuji Yamamoto; Hiroyuki Fukuda; Masato Oguchi (IMCOM, 2021)

Power Prediction for Sustainable HPC. - Shigeto Suzuki; Michiko Hiraoka; Takashi Shiraishi; Enxhi Kreshpa; Takuji Yamamoto; Hiroyuki Fukuda; Shuji Matsui; Masahide Fujisaki; Atsuya Uno (J. Inf. Process., 2021)

Highly power-efficient (2 pJ/bit), 128Gbps 16QAM signal generation of coherent optical DAC transmitter using 28-nm CMOS driver and all-silicon segmented modulator. - Yohei Sobu; Guoxiu Huang; Toshihiko Mori; Yukito Tsunoda; Takuji Yamamoto; Shinsuke Tanaka; Takeshi Hoshida (OFC, 2022)

SimpleZSL: Extremely Simple and Fast Zero-Shot Learning with Nearest Neighbor Classifiers. - Masayuki Hiromoto; Hisanao Akima; Teruo Ishihara; Takuji Yamamoto (IEICE Trans. Inf. Syst., 2022)

High-speed and low-power optical DAC transmitter using all-silicon lumped segmented modulator directly driven by CMOS inverter driver. - Yohei Sobu; Yukito Tsunoda; Toshihiko Mori; Guoxiu Huang; Takuji Yamamoto; Shinsuke Tanaka; Takeshi Hoshida (OFC, 2024)