Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor. - Hidetomo Kobayashi; Kiyoshi Kato; Takuro Ohmaru; Seiichi Yoneda; Tatsuji Nishijima; Shuhei Maeda; Kazuaki Ohshima; Hikaru Tamura; Hiroyuki Tomatsu; Tomoaki Atsumi; Yutaka Shionoiri; Yukio Maehashi; et al. (COOL Chips, 2013)

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. - Hikaru Tamura; Kiyoshi Kato; Takahiko Ishizu; Tatsuya Onuki; Wataru Uesugi; Takuro Ohmaru; Kazuaki Ohshima; Hidetomo Kobayashi; Seiichi Yoneda; Atsuo Isobe; Naoaki Tsutsui; Suguru Hondo; et al. (COOL Chips, 2014)

A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor. - Atsuo Isobe; Hikaru Tamura; Kiyoshi Kato; Takuro Ohmaru; Wataru Uesugi; Takahiko Ishizu; Tatsuya Onuki; Kazuaki Ohshima; Takanori Matsuzaki; Atsushi Hirose; Yasutaka Suzuki; Naoaki Tsutsui; et al. (VLSIC, 2014)

6.5 25.3μW at 60fps 240×160-pixel vision sensor for motion capturing with in-pixel non-volatile analog memory using crystalline oxide semiconductor FET. - Takuro Ohmaru; Takashi Nakagawa; Shuhei Maeda; Yuki Okamoto; Munehiro Kozuma; Seiichi Yoneda; Hiroki Inoue; Yoshiyuki Kurokawa; Takayuki Ikeda; Yoshinori Ieda; Naoto Yamade; Hidekazu Miyairi; et al. (ISSCC, 2015)

A 25 3 μW at 60 fps 240 × 160 Pixel Vision Sensor for Motion Capturing With In-Pixel Nonvolatile Analog Memory Using CAAC-IGZO FET. - Takuro Ohmaru; Takashi Nakagawa; Shuhei Maeda; Yuki Okamoto; Munehiro Kozuma; Seiichi Yoneda; Hiroki Inoue; Yoshiyuki Kurokawa; Takayuki Ikeda; Yoshinori Ieda; Naoto Yamade; Hidekazu Miyairi; et al. (IEEE J. Solid State Circuits, 2016)