An Evolutionary Algorithm Extended by Ecological Analogy and its Application to the Game of Go. - Takuya Kojima; Kazuhiro Ueda; Saburo Nagano (IJCAI (1), 1997)

A Two-Step Model of Pattern Acquisition: Application to Tsume-Go. - Takuya Kojima; Atsushi Yoshikawa 002 (Computers and Games, 1998)

Relations between Skill and the Use of Terms - An Analysis of Protocols of the Game of Go. - Atsushi Yoshikawa 002; Takuya Kojima; Yasuki Saito (Computers and Games, 1998)

Humanoid Robots in Waseda University-Hadaly-2 and WABIAN. - Shuji Hashimoto; Seinosuke Narita; Hironori Kasahara; Katsuhiko Shirai; Atsuo Kobayashi; Atsuo Takanishi; Shigeki Sugano; Jin'ichi Yamaguchi; Hideyuki Sawada; Hideaki Takanobu; Koji Shibuya; Toshio Morita; et al. (Auton. Robots, 2002)

Integration of emotion expression and visual tracking locomotion based on Vestibulo-Ocular Reflex. - Nobutsuna Endo; Keita Endo; Kenji Hashimoto; Takuya Kojima; Fumiya Iida; Atsuo Takanishi (RO-MAN, 2010)

Impression survey of the emotion expression humanoid robot with mental model based dynamic emotions. - Tatsuhiro Kishi; Takuya Kojima; Nobutsuna Endo; Matthieu Destephe; Takuya Otani; Lorenzo Jamone; Przemyslaw Kryczka; Gabriele Trovato; Kenji Hashimoto; Sarah Cosentino; Atsuo Takanishi (ICRA, 2013)

Body bias optimization for variable pipelined CGRA. - Takuya Kojima; Naoki Ando; Hayate Okuhara; Ng. Anh Vu Doan; Hideharu Amano (FPL, 2017)

Scalable deep neural network accelerator cores with cubic integration using through chip interface. - Ryuichi Sakamoto; Ryo Takata; Jun Ishii; Masaaki Kondo; Hiroshi Nakamura; Tetsui Ohkubo; Takuya Kojima; Hideharu Amano (ISOCC, 2017)

The Design and Implementation of Scalable Deep Neural Network Accelerator Cores. - Ryuichi Sakamoto; Ryo Takata; Jun Ishii; Masaaki Kondo; Hiroshi Nakamura; Tetsui Ohkubo; Takuya Kojima; Hideharu Amano (MCSoC, 2017)

Glitch-aware variable pipeline optimization for CGRAs. - Takuya Kojima; Naoki Ando; Hayate Okuhara; Hideharu Amano (ReConFig, 2017)

A Configuration Data Multicasting Method for Coarse-Grained Reconfigurable Architectures. - Takuya Kojima; Hideharu Amano (FPL, 2018)

Real Chip Evaluation of a Low Power CGRA with Optimized Application Mapping. - Takuya Kojima; Naoki Ando; Yusuke Matshushita; Hayate Okuhara; Ng. Anh Vu Doan; Hideharu Amano (HEART, 2018)

Performance evaluation of 2D and 3D deep learning approaches for automatic segmentation of multiple organs on CT images. - Xiangrong Zhou; Kazuma Yamada; Takuya Kojima; Ryosuke Takayama; Song Wang 002; Xinxin Zhou; Takeshi Hara; Hiroshi Fujita 001 (Computer-Aided Diagnosis, 2018)

Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures. - Takuya Kojima; Naoki Ando; Hayate Okuhara; Ng. Anh Vu Doan; Hideharu Amano (IEICE Trans. Inf. Syst., 2018)

Demonstration of Low Power Stream Processing Using a Variable Pipelined CGRA. - Takuya Kojima; Naoki Ando; Yusuke Matsushita 001; Hideharu Amano (FPL, 2019)

Real Chip Performance Evaluation on Through Chip Interface IP for Renesas SOTB 65nm Process. - Hideto Kayashima; Takuya Kojima; Hayate Okuhara; Tsunaaki Shidei; Hideharu Amano (CANDAR Workshops, 2019)

A Coarse-Grained Reconfigurable Architecture with a Fault Tolerant Non-Volatile Configurable Memory. - Takeharu Ikezoe; Takuya Kojima; Hideharu Amano (FPT, 2019)

A Preliminary Evaluation of Building Block Computing Systems. - Sayaka Terashima; Takuya Kojima; Hayate Okuhara; Kazusa Musha; Hideharu Amano; Ryuichi Sakamoto; Masaaki Kondo; Mitaro Namiki (MCSoC, 2019)

Automatic anatomy partitioning of the torso region on CT images by using a deep convolutional network with majority voting. - Xiangrong Zhou; Takuya Kojima; Song Wang 002; Xinxin Zhou; Takeshi Hara; Taiki Nozaki; Masaki Matsusako; Hiroshi Fujita 001 (Computer-Aided Diagnosis, 2019)

Refinements in Data Manipulation Method for Coarse Grained Reconfigurable Architectures. - Takuya Kojima; Hideharu Amano (ReCoSoC, 2019)

A Fine-Grained Multicasting of Configuration Data for Coarse-Grained Reconfigurable Architectures. - Takuya Kojima; Hideharu Amano (IEICE Trans. Inf. Syst., 2019)

Burst-Mode CMOS Transimpedance Amplifier Based on a Regulated-Cascode Circuit with Gain-Mode Switching. - Takuya Kojima; Mamoru Kunieda; Makoto Nakamura; Daisuke Ito; Keiji Kishine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019)

GenMap: A Genetic Algorithmic Approach for Optimizing Spatial Mapping of Coarse-Grained Reconfigurable Architectures. - Takuya Kojima; Nguyen Anh Vu Doan; Hideharu Amano (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops. - Aika Kamei; Takuya Kojima; Hideharu Amano; Daiki Yokoyama; Hisato Miyauchi; Kimiyoshi Usami; Keizo Hiraga; Kenta Suzuki; Kazuhiro Bessho (MCSoC, 2021)

Recovering Faulty Non-Volatile Flip Flops for Coarse-Grained Reconfigurable Architectures. - Takeharu Ikezoe; Takuya Kojima; Hideharu Amano (IEICE Trans. Electron., 2021)

The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC. - Boma A. Adhi; Carlos Cortes; Yiyu Tan; Takuya Kojima; Artur Podobas; Kentaro Sano (CLUSTER, 2022)

Body Bias Control on a CGRA based on Convex Optimization. - Takuya Kojima; Hayate Okuhara; Masaaki Kondo; Hideharu Amano (COOL CHIPS, 2022)

Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage. - Boma A. Adhi; Carlos Cortes; Tomohiro Ueno; Yiyu Tan; Takuya Kojima; Artur Podobas; Kentaro Sano (FPT, 2022)

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation. - Boma A. Adhi; Carlos Cortes; Yiyu Tan; Takuya Kojima; Artur Podobas; Kentaro Sano (IPDPS Workshops, 2022)

An Architecture- Independent CGRA Compiler enabling OpenMP Applications. - Takuya Kojima; Boma A. Adhi; Carlos Cortes; Yiyu Tan; Kentaro Sano (IPDPS Workshops, 2022)

An efficient compilation of coarse-grained reconfigurable architectures utilizing pre-optimized sub-graph mappings. - Ayaka Ohwada; Takuya Kojima; Hideharu Amano (PDP, 2022)

Mapping-Aware Kernel Partitioning Method for CGRAs Assisted by Deep Learning. - Takuya Kojima; Ayaka Ohwada; Hideharu Amano (IEEE Trans. Parallel Distributed Syst., 2022)

Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC. - Boma A. Adhi; Carlos Cortes; Emanuele Del Sozzo; Tomohiro Ueno; Yiyu Tan; Takuya Kojima; Artur Podobas; Kentaro Sano (IPDPS Workshops, 2023)

An Area-Efficient Coarse-Grained Reconfigurable Array Design for Approximate Computing. - Kaito Kutsuna; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (MCSoC, 2023)

ILP Based Mapping for Elastic CGRAs. - Makoto Saito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (RTCSA, 2023)

A Scalable Body Bias Optimization Method Toward Low-Power CGRAs. - Takuya Kojima; Hayate Okuhara; Masaaki Kondo; Hideharu Amano (IEEE Micro, 2023)

A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops. - Aika Kamei; Hideharu Amano; Takuya Kojima; Daiki Yokoyama; Kimiyoshi Usami; Keizo Hiraga; Kenta Suzuki; Kazuhiro Bessho (IEEE Trans. Very Large Scale Integr. Syst., 2023)

SLMLET: A RISC-V Processor SoC with Tightly-Coupled Area-Efficient eFPGA Blocks. - Takuya Kojima; Yosuke Yanai; Hayate Okuhara; Hideharu Amano; Morihiro Kuga; Masahiro Iida (COOL CHIPS, 2024)

MLIR-Based Homomorphic Encryption Compiler for GPU. - Ai Nozaki; Takuya Kojima; Hiroshi Nakamura; Hideki Takase (HEART, 2024)

A Scalable Mapping Method for Elastic CGRAs. - Makoto Saito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (IPDPS (Workshops), 2024)

A Study on Number Theoretic Transform Acceleration on AMD AI Engine. - Ai Nozaki; Takuya Kojima; Hiroshi Nakamura; Hideki Takase (MCSoC, 2024)

Development of an Environmentally Independent Mobile Manipulation System for Product Disposal in Retail Stores. - Ryogo Kai; Kenta Ohashi; Hikaru Fujita; Takuya Kojima; Yuma Sasaki; Mihoko Niitsuma; Kazunori Umeda (SII, 2024)

Situation-based Proactive Human-Robotic Systems Interaction and Collaboration in Future Convenience Stores. - Atsushi Sugimoto; Yuma Sasaki; Takuya Kojima; Otono Uchikawa; Taisei Inaba; Taito Nishikawa; Mihoko Niitsuma (SII, 2024)

Applying Run-Length Compression to the Configuration Data of SLM Fine-Grained Reconfigurable Logic. - Souhei Takagi; Takuya Kojima; Hideharu Amano; Morihiro Kuga; Masahiro Iida (IEICE Trans. Inf. Syst., 2024)

A Decoupled Coarse-Grained Reconfigurable Architecture by Introducing Data Flow Management Unit. - Hisako Ito; Takuya Kojima; Hideki Takase; Hiroshi Nakamura (IPDPS (Workshops), 2025)

Efficient Navigation in Crowded Environments for Autonomous Electric Wheelchairs Using Human Flow Activity Trend and Most Frequent Direction. - Takuya Kojima; Mihoko Niitsuma (SII, 2025)

An Open-Source Framework for Efficient Side-Channel Analysis on Cryptographic Implementations. - Takuya Kojima; Masaki Morita; Hideki Takase; Hiroshi Nakamura (IACR Cryptol. ePrint Arch., 2025)