An area compact soft error resident circuit for FPGA. - Motoki Amagasaki; Yuji Nakamura; Takuya Teraoka; Masahiro Iida; Toshinori Sueyoshi (ICICDT, 2016)

A novel soft error tolerant FPGA architecture. - Motoki Amagasaki; Yuji Nakamura; Takuya Teraoka; Masahiro Iida; Toshinori Sueyoshi (VLSI-SoC, 2016)