Cache with Synchronization Mechanism. - Hideharu Amano; Takuya Terasawa; Tomohiro Kudoh (IFIP Congress, 1989)

A Parallel Logic Simulation Algorithm Based on Query. - Tomohiro Kudoh; Tetsuro Kimura; Hideharu Amano; Takuya Terasawa (ICPP (3), 1992)

A query-based parallel logic simulation algorithm. - Tomohiro Kudoh; Tetsuro Kimura; Hideharu Amano; Takuya Terasawa (Syst. Comput. Jpn., 1993)

A Performance Evaluation of the Multiprocessor Testbed ATTEMPT-0. - Takuya Terasawa; Ou Yamamoto; Tomohiro Kudoh; Hideharu Amano (Parallel Comput., 1995)

ATTEMPT-1: A Reconfigurable Multiprocessor Testbed. - Keisuke Inoue; Toru Kisuki; Michitaka Okuno; Etsuko Shimizu; Takuya Terasawa; Hideharu Amano (FPL, 1996)

A study on snoop cache systems for single-chip multiprocessors. - Takuya Terasawa; Keisuke Inoue; Hitoshi Kurosawa; Hideharu Amano (Syst. Comput. Jpn., 1997)

An analysis of fairness and overhead in the arbitration protocol of the IEEE Futurebus standard. - Ou Yamamoto; Takuya Terasawa; Hideharu Amano (Syst. Comput. Jpn., 1998)

A MAC Protocol Using Energy Signals for QoS in Ad Hoc Wireless Networks. - Kiyoshi Takahashi; Takuya Terasawa; Toshinori Tsuboi (VTC Spring, 2007)

A Novel MAC Protocol for QoS in Ad Hoc Wireless Networks. - Kiyoshi Takahashi; Takuya Terasawa; Toshinori Tsuboi (IEICE Trans. Commun., 2008)