SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers. - Arthur Nieuwoudt; Tamer Ragheb; Yehia Massoud (DAC, 2006)

Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration. - Tamer Ragheb; Arthur Nieuwoudt; Yehia Massoud (ACM Great Lakes Symposium on VLSI, 2006)

Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers. - Arthur Nieuwoudt; Tamer Ragheb; Yehia Massoud (ASP-DAC, 2007)

Thermally robust clocking schemes for 3D integrated circuits. - Mosin Mondal; Andrew J. Ricketts; Sami Kirolos; Tamer Ragheb; Greg M. Link; Narayanan Vijaykrishnan; Yehia Massoud (DATE, 2007)

Theory and Implementation of an Analog-to-Information Converter using Random Demodulation. - Jason N. Laska; Sami Kirolos; Marco F. Duarte; Tamer Ragheb; Richard G. Baraniuk; Yehia Massoud (ISCAS, 2007)

Variability-Aware Synthesis for Wideband Low Noise Amplifiers. - Yehia Massoud; Arthur Nieuwoudt; Tamer Ragheb (ISCAS, 2007)

Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks. - Hamid Nejati; Tamer Ragheb; Arthur Nieuwoudt; Yehia Massoud (ISCAS, 2007)

Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. - Mosin Mondal; Andrew J. Ricketts; Sami Kirolos; Tamer Ragheb; Greg M. Link; Narayanan Vijaykrishnan; Yehia Massoud (ISQED, 2007)

Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations. - Mosin Mondal; Tamer Ragheb; Xiang Wu; Adnan Aziz; Yehia Massoud (ISQED, 2007)

Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations. - Arthur Nieuwoudt; Tamer Ragheb; Hamid Nejati; Yehia Massoud (ISQED, 2007)

Systematic Design Optimization Methodology for Multi-Band CMOS Low Noise Amplifiers. - Arthur Nieuwoudt; Tamer Ragheb; Yehia Massoud (ISVLSI, 2007)

Implementing DSP Algorithms with On-Chip Networks. - Xiang Wu; Tamer Ragheb; Adnan Aziz; Yehia Massoud (NOCS, 2007)

Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design. - Arthur Nieuwoudt; Tamer Ragheb; Yehia Massoud (Microelectron. J., 2007)

On the design of customizable low-voltage common-gate LNA-mixer pair using current and charge reusing techniques. - Hamid Nejati; Tamer Ragheb; Yehia Massoud (ACM Great Lakes Symposium on VLSI, 2008)

On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications. - Tamer Ragheb; Yehia Massoud (ICCAD, 2008)

A fault-aware dynamic routing algorithm for on-chip networks. - Amir Hosseini; Tamer Ragheb; Yehia Massoud (ISCAS, 2008)

Analytical modeling of common-gate low noise amplifiers. - Hamid Nejati; Tamer Ragheb; Yehia Massoud (ISCAS, 2008)

On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion. - Stephen Pfetsch; Tamer Ragheb; Jason N. Laska; Hamid Nejati; Anna C. Gilbert; Martin Strauss 001; Richard G. Baraniuk; Yehia Massoud (ISCAS, 2008)

Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers. - Arthur Nieuwoudt; Tamer Ragheb; Hamid Nejati; Yehia Massoud (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers. - Tamer Ragheb; Andrew J. Ricketts; Mosin Mondal; Sami Kirolos; Greg M. Link; Vijaykrishnan Narayanan; Yehia Massoud (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Calibration of propagation delay of flip-flops. - Tamer Ragheb; Andrew Marshall (SoCC, 2012)