A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet Classification. - Amit Prakash; Ramakrishna Kotla; Tanmoy Mandal; Adnan Aziz (IWLS, 2002)

A high-performance architecture and BDD-based synthesis methodology for packet classification. - Amit Prakash; Ramakrishna Kotla; Tanmoy Mandal; Adnan Aziz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)