Tanvir Ahmed

Orcid: 0000-0002-3873-3993

Affiliations:
  • Tokyo Institute of Technology, Japan
  • Nara Institute of Science and Technology, Japan (PhD 2014)
  • Linköping University, Sweden (former)


According to our database1, Tanvir Ahmed authored at least 6 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2017
Subleq⊝: An Area-Efficient Two-Instruction-Set Computer.
IEEE Embed. Syst. Lett., 2017

2015
Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC.
Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

Timing speculation-aware instruction set extension for resource-constrained embedded systems.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2013
Selective Check of Data-Path for Effective Fault Tolerance.
IEICE Trans. Inf. Syst., 2013

2012
Introducing OVP awareness to achieve an efficient permanent defect locating.
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

2011
A 512-point 8-parallel pipelined feedforward FFT for WPAN.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011


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