A Hierarchical Distributed Fog Computing Architecture for Big Data Analysis in Smart Cities. - Bo Tang 011; Zhen Chen 002; Gerald Hefferman; Tao Wei 001; Haibo He; Qing Yang 001 (ASE BD&SI, 2015)

Reflex-Tree: A Biologically Inspired Parallel Architecture for Future Smart Cities. - Jason Kane; Bo Tang 011; Zhen Chen 002; Jun Yan 007; Tao Wei 001; Haibo He; Qing Yang 001 (ICPP, 2015)

A Cost-Effective Geodetic Strainmeter Based on Dual Coaxial Cable Bragg Gratings. - Jihua Fu; Xu Wang; Tao Wei 001; Meng Wei; Yang Shen (Sensors, 2017)

Incorporating Intelligence in Fog Computing for Big Data Analysis in Smart Cities. - Bo Tang 011; Zhen Chen 002; Gerald Hefferman; Shuyi Pei; Tao Wei 001; Haibo He; Qing Yang 001 (IEEE Trans. Ind. Informatics, 2017)

A Bus Authentication and Anti-Probing Architecture Extending Hardware Trusted Computing Base Off CPU Chips and Beyond. - Zhenyu Xu; Thomas Mauldin; Zheyi Yao; Shuyi Pei; Tao Wei 001; Qing Yang 001 (ISCA, 2020)

An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components. - Lukas Leuenberger; Dorian Amiet; Tao Wei 001; Paul Zbinden (Zenodo, 2020)

Runtime Detection of Probing/Tampering on Interconnecting Buses. - Zhenyu Xu; Thomas Mauldin; Qing Yang 001; Tao Wei 001 (FCCM, 2021)

An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components. - Lukas Leuenberger; Dorian Amiet; Tao Wei 001; Paul Zbinden (FPGA, 2021)

Minimal Overhead Optical Time-Domain Reflectometer Via I/O Integrated Data Converter Enabled by Field Programmable Voltage Offset. - Thomas Mauldin; Zhenyu Xu; Tao Wei 001 (FPL, 2021)

A High-Performance, Reconfigurable, Fully Integrated Time-Domain Reflectometry Architecture Using Digital I/Os. - Zhenyu Xu; Thomas Mauldin; Zheyi Yao; Gerald Hefferman; Tao Wei 001 (IEEE Trans. Instrum. Meas., 2021)

An Integrated OFDR System Using Combined Swept-Laser Linearization and Phase Error Compensation. - Zheyi Yao; Thomas Mauldin; Zhenyu Xu; Gerald Hefferman; Tao Wei 001 (IEEE Trans. Instrum. Meas., 2021)

Software defined optical time-domain reflectometer. - Thomas Mauldin; Zhenyu Xu; Tao Wei 001 (FCCM, 2022)

Highly Scalable Runtime Countermeasure Against Microprobing Attacks on Die-to-Die Interconnections in System-in-Package. - Zhenyu Xu; Thomas Mauldin; Qing Yang 001; Tao Wei 001 (FPGA, 2022)

In-Sensor Neural Network Preprocessing for ADAS Computer Systems. - Erkan Karakus; Mark Bruckner; Tao Wei 001; Qing Yang 001 (NAS, 2022)

A Novel Interconnection Architecture for Secured Die-to-Die Communication in System-in-Package. - Zhenyu Xu; Qing Yang 001; Tao Wei 001 (NAS, 2022)

A Novel FPGA-Based Circuit Simulator for Accelerating Reinforcement Learning-Based Design of Power Converters. - Zhenyu Xu; Miaoxiang Yu; Jillian Cai; Qing Yang 001; Yeonho Jeong; Tao Wei 001 (ASAP, 2023)

A Heterogeneous Computer Architecture Accelerating Reinforcement Learning-based Design for Silicon Photonic Devices. - Miaoxiang Yu; Zhenyu Xu; Jillian Cai; Qing Yang 001; Tao Wei 001 (ASAP, 2023)

A Finite-Difference Time-Domain (FDTD) solver with linearly scalable performance in an FPGA cluster. - Zhenyu Xu; Miaoxiang Yu; Jillian Cai; Qing Yang 001; Tao Wei 001 (CLUSTER, 2023)

A Novel FPGA Simulator Accelerating Reinforcement Learning-Based Design of Power Converters. - Zhenyu Xu; Miaoxiang Yu; Qing Yang 001; Yeonho Jeong; Tao Wei 001 (FPGA, 2023)

Falcon Takes Off - A Hardware Implementation of the Falcon Signature Scheme. - Michael Schmid; Dorian Amiet; Jan Wendler; Paul Zbinden; Tao Wei 001 (IACR Cryptol. ePrint Arch., 2023)

TwinStep Network (TwNet): a Neuron-Centric Architecture Achieving Rapid Training. - Zhenyu Xu; Miaoxiang Yu; Jillian Cai; Qing Yang 001; Tao Wei 001 (ASAP, 2024)

An FPGA-Enabled Framework for Rapid Automated Design of Photonic Integrated Circuits. - Zhenyu Xu; Miaoxiang Yu; Jillian Cai; Saddam Gafsi; Judson Douglas Ryckman; Qing Yang 001; Tao Wei 001 (FPGA, 2024)

Machine Learning in Sensors for Collision Avoidance. - Erkan Karakus; Tao Wei 001; Qing Yang 001 (ICNC, 2024)

HEDWIG: Homomorphic Encryption Accelerator Design Using BFV-HPS With HiGh-Speed Fixed-Point Approximation. - Antian Wang; Weihang Tan; Zhenyu Xu; Tao Wei 001; Caiwen Ding; Keshab K. Parhi; Yingjie Lao (FPGA, 2025)

Tile-Level Pipeline for Linear Scalable Stencil Computation on AMD AI Engines. - Zhenyu Xu; Miaoxiang Yu; Yazhe Zhang; Jillian Cai; Qing Yang 001; Tao Wei 001 (FPGA, 2025)