Computation and Data Partitioning on Scalable Shared Memory Multiprocessors. - Sudarsan Tandri; Tarek S. Abdelrahman (PDPTA, 1995)

Scheduling of Wavefront Parallelism on Scalable Shared-memory Multiprocessors. - Naraig Manjikian; Tarek S. Abdelrahman (ICPP, Vol. 3, 1996)

Automatic Data and Computation Partitioning on Scalable Shared Memory Multiprocessors. - Sudarsan Tandri; Tarek S. Abdelrahman (LCPC, 1996)

Exploiting Task-Level Parallelism Using pTask. - Tarek S. Abdelrahman; Sum Huynh (PDPTA, 1996)

Evaluation of Dynamic Data Distributions on NUMA Shared Memory Multiprocessors. - Tarek S. Abdelrahman; Kenneth L. Ma (PDPTA, 1996)

Latency hiding on COMA multiprocessors. - Tarek S. Abdelrahman (J. Supercomput., 1996)

Automatic Partitioning of Data and Computations on Scalable Shared Memory Multiprocessors. - Sudarsan Tandri; Tarek S. Abdelrahman (ICPP, 1997)

Tuning Shared Network Cache Size vs. Second-Level Cache Size in Clusters-Based Multiprocessors. - Edward D. Moreno; Sergio Takeo Kofuji; Michael Stumm; Tarek S. Abdelrahman (PaCT, 1997)

Fusion of Loops for Parallelism and Locality. - Naraig Manjikian; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 1997)

Locality Enhancement for Large-Scale Shared-Memory Multiprocessors. - Tarek S. Abdelrahman; Naraig Manjikian; Gary Liu; Sudarsan Tandri (LCR, 1998)

Compiler Support for Array Distribution on NUMA Shared Memory Multiprocessors. - Tarek S. Abdelrahman; Thomas N. Wong (J. Supercomput., 1998)

Overlap of Computation and Communication on Shared-Memory. - Tarek S. Abdelrahman; Gary Liu (Parallel Distributed Comput. Pract., 1999)

The NUMAchine Multiprocessor. - R. Grindley; Tarek S. Abdelrahman; Stephen Brown 003; S. Caranci; D. DeVries; Benjamin Gamsa; A. Grbic; M. Gusat; R. Ho; Orran Krieger; Guy G. Lemieux; K. Loveless; et al. (ICPP, 2000)

A Compiler Infrastructure for High-Performance Java. - Neil V. Brewster; Tarek S. Abdelrahman (HPCN Europe, 2001)

Exploiting Wavefront Parallelism on Large-Scale Shared-Memory Multiprocessors. - Naraig Manjikian; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 2001)

A Modular and Extensible JVM Infrastructure. - Patrick Doyle; Tarek S. Abdelrahman (Java Virtual Machine Research and Technology Symposium, 2002)

Catenation and specialization for Tcl virtual machine performance. - Benjamin Vitale; Tarek S. Abdelrahman (IVME, 2004)

The Use of Traces for Inlining in Java Programs. - Borys J. Bradel; Tarek S. Abdelrahman (LCPC, 2004)

Improving the structure of loop nests in scientific programs. - Tarek S. Abdelrahman; Robert Sawaya (Comput. Syst. Sci. Eng., 2004)

A Multilevel Computing Architecture for Embedded Multimedia Applications. - Faraydon Karim; Alain Mellan; Anh Nguyen; Utku Aydonat; Tarek S. Abdelrahman (IEEE Micro, 2004)

The design and implementation of a modular and extensible Java Virtual Machine. - Patrick Doyle; Carlos Cavanna; Tarek S. Abdelrahman (Softw. Pract. Exp., 2004)

Run-Time Support for the Automatic Parallelization of Java Programs. - Bryan Chan; Tarek S. Abdelrahman (J. Supercomput., 2004)

A Characterization of Traces in Java Programs. - Borys J. Bradel; Tarek S. Abdelrahman (PLC, 2005)

Power Optimization for the MLCA Using Dynamic Voltage Scaling. - Ivan Matosevic; Tarek S. Abdelrahman; Faraydon Karim; Alain Mellan (SCOPES, 2005)

Locality management using multiple SPMs on the Multi-Level Computing Architecture. - Ahmed Abdelkhalek 002; Tarek S. Abdelrahman (ESTIMedia, 2006)

Automatic Trace-Based Parallelization of Java Programs. - Borys J. Bradel; Tarek S. Abdelrahman (ICPP, 2007)

The potential of trace-level parallelism in Java programs. - Borys J. Bradel; Tarek S. Abdelrahman (PPPJ, 2007)

hiCUDA: a high-level directive-based language for GPU programming. - Tianyi David Han; Tarek S. Abdelrahman (GPGPU, 2009)

The use of hardware transactional memory for the trace-based parallelization of recursive Java programs. - Borys J. Bradel; Tarek S. Abdelrahman (PPPJ, 2009)

A study of potential parallelism among traces in Java programs. - Borys J. Bradel; Tarek S. Abdelrahman (Sci. Comput. Program., 2009)

Hardware Support for Relaxed Concurrency Control in Transactional Memory. - Utku Aydonat; Tarek S. Abdelrahman (MICRO, 2010)

Reducing branch divergence in GPU programs. - Tianyi David Han; Tarek S. Abdelrahman (GPGPU, 2011)

Towards Synthesis-Free JIT Compilation to Commodity FPGAs. - Davor Capalija; Tarek S. Abdelrahman (FCCM, 2011)

Parallelization of multimedia applications on the multi-level computing architecture. - Utku Aydonat; Tarek S. Abdelrahman (J. Embed. Comput., 2011)

hiCUDA: High-Level GPGPU Programming. - Tianyi David Han; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 2011)

Efficient bottom-up heap analysis for symbolic path-based data access summaries. - Ivan Matosevic; Tarek S. Abdelrahman (CGO, 2012)

Architectural support for synchronization-free deterministic parallel programming. - Cedomir Segulja; Tarek S. Abdelrahman (HPCA, 2012)

Inlining with traces in Java programs. - Borys J. Bradel; Tarek S. Abdelrahman (Comput. Syst. Sci. Eng., 2012)

Relaxed Concurrency Control in Software Transactional Memory. - Utku Aydonat; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 2012)

Reducing divergence in GPGPU programs with loop merging. - Tianyi David Han; Tarek S. Abdelrahman (GPGPU@ASPLOS, 2013)

A high-performance overlay architecture for pipelined execution of data flow graphs. - Davor Capalija; Tarek S. Abdelrahman (FPL, 2013)

Parallel Radix Sort on the AMD Fusion Accelerated Processing Unit. - Michael C. Delorme; Tarek S. Abdelrahman; Chengyan Zhao (ICPP, 2013)

Microarchitecture of a Coarse-Grain Out-of-Order Superscalar Processor. - Davor Capalija; Tarek S. Abdelrahman (IEEE Trans. Parallel Distributed Syst., 2013)

What is the cost of weak determinism? - Cedomir Segulja; Tarek S. Abdelrahman (PACT, 2014)

Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays. - Davor Capalija; Tarek S. Abdelrahman (FPL, 2014)

Automatic Tuning of Local Memory Use on GPGPUs. - Tianyi David Han; Tarek S. Abdelrahman (CoRR, 2014)

Genesis: a language for generating synthetic training programs for machine learning. - Alton Chiu; Joseph Garvey; Tarek S. Abdelrahman (Conf. Computing Frontiers, 2015)

Automatic Performance Tuning of Stencil Computations on GPUs. - Joseph D. Garvey; Tarek S. Abdelrahman (ICPP, 2015)

Clean: a race detector with cleaner semantics. - Cedomir Segulja; Tarek S. Abdelrahman (ISCA, 2015)

Accelerating K-means clustering on a tightly-coupled processor-FPGA heterogeneous system. - Tarek S. Abdelrahman (ASAP, 2016)

A Sampling Based Strategy to Automatic Performance Tuning of GPU Programs. - Wilson Feng; Tarek S. Abdelrahman (IPDPS Workshops, 2017)

Use of Synthetic Benchmarks for Machine-Learning-Based Performance Auto-Tuning. - Tianyi David Han; Tarek S. Abdelrahman (IPDPS Workshops, 2017)

Launch-Time Optimization of OpenCL GPU Kernels. - Andrew S. D. Lee; Tarek S. Abdelrahman (GPGPU@PPoPP, 2017)

A Language and Preprocessor for User-Controlled Generation of Synthetic Programs. - Alton Chiu; Joseph Garvey; Tarek S. Abdelrahman (Sci. Program., 2017)

User-Transparent Translation of Machine Instructions to Programmable Hardware. - Leslie Barron; Tarek S. Abdelrahman (IPDPS Workshops, 2018)

Fast On-the-fly Retraining-free Sparsification of Convolutional Neural Networks. - Amir H. Ashouri; Tarek S. Abdelrahman; Alwyn Dos Remedios (CoRR, 2018)

A Strategy for Automatic Performance Tuning of Stencil Computations on GPUs. - Joseph D. Garvey; Tarek S. Abdelrahman (Sci. Program., 2018)

Retraining-free methods for fast on-the-fly pruning of convolutional neural networks. - Amir H. Ashouri; Tarek S. Abdelrahman; Alwyn Dos Remedios (Neurocomputing, 2019)

Balancing Graph Processing Workloads Using Work Stealing on Heterogeneous CPU-FPGA Systems. - Matthew Agostini; Francis O'Brien; Tarek S. Abdelrahman (ICPP, 2020)

Optimizing OpenCL Kernels and Runtime for DNN Inference on FPGAs. - Seung-Hun Chung; Tarek S. Abdelrahman (IPDPS Workshops, 2020)

Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System. - Tarek S. Abdelrahman (ACM Trans. Archit. Code Optim., 2020)

A Streaming Accelerator for Heterogeneous CPU-FPGA Processing of Graph Applications. - Francis O'Brien; Matthew Agostini; Tarek S. Abdelrahman (IPDPS Workshops, 2021)

Pipelined Training with Stale Weights in Deep Convolutional Neural Networks. - Lifu Zhang; Tarek S. Abdelrahman (Appl. Comput. Intell. Soft Comput., 2021)

Optimization of Compiler-Generated OpenCL CNN Kernels and Runtime for FPGAs. - Seung-Hun Chung; Tarek S. Abdelrahman (IPDPS Workshops, 2022)

Reuse-Aware Partitioning of Dataflow Graphs on a Tightly-Coupled CGRA. - Nikhil Sambhus; Tarek S. Abdelrahman (ISPA/BDCloud/SocialCom/SustainCom, 2022)

A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs. - Seung-Hun Chung; Tarek S. Abdelrahman (CoRR, 2022)

Efficient Data Streaming for a Tightly-Coupled Coarse-Grained Reconfigurable Array. - Mahdi Abbaszadeh; Tarek S. Abdelrahman; Reza Azimi; Tomasz S. Czajkowski; Maziar Goudarzi (IPDPS Workshops, 2023)

RoDMap: A Reserve-on-Demand Mapper for Spatially-Configured Coarse-Grained Reconfigurable Arrays. - Kyle Zhao Bin Chen; Tarek S. Abdelrahman; Reza Azimi; Tomasz S. Czajkowski; Maziar Goudarzi (ICPP, 2024)

On-the-Fly Data Layout Conversion for GEMM on AI Accelerators. - Fang Gao; Xingyu Yue; Chenchen Tang; Hongyi Chen; Kai-Ting Amy Wang; Tarek S. Abdelrahman (ISPA, 2024)

PolyMorphous: An MLIR-Based Polyhedral Compiler with Loop Transformation Primitives. - Jinman Zhao; Seyed Aryan Vahabpour; Xingyu Yue; Kai-Ting Amy Wang; Tarek S. Abdelrahman (IPDPS, 2025)