An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (VDAT, 2017)

A High-Performance VLSI Architecture of the Present Cipher and its Implementations for SoCs. - Jai Gopal Pandey; Tarun Goel; Mausam Nayak; Chhavi Mitharwal; Abhijit Karmakar; Raj Singh (SoCC, 2018)

A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations. - Jai Gopal Pandey; Tarun Goel; Mausam Nayak; Chhavi Mitharwal; Sajid Khan 001; Santosh Kumar Vishvakarma; Abhijit Karmakar; Raj Singh (VDAT, 2018)

A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (VLSID, 2018)

Hardware architectures for PRESENT block cipher and their FPGA implementations. - Jai Gopal Pandey; Tarun Goel; Abhijit Karmakar (IET Circuits Devices Syst., 2019)

A Logic-Based Agent Modelling Paradigm for Investment in Derivatives Markets. - Jonathan Waller; Tarun Goel (SAI (2), 2020)