Statistical Performance Modeling and Parametric Yield Estimation of MOS VLSI. - Tat-Kwan Yu; Sung-Mo Kang; I. N. Haji; Timothy N. Trick (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

iEDISON: an interactive statistical design tool for MOS VLSI circuits. - Tat-Kwan Yu; Sung-Mo Kang; Ibrahim N. Hajj; Timothy N. Trick (ICCAD, 1988)

An efficient method for parametric yield optimization of MOS integrated circuits. - Tat-Kwan Yu; Sung-Mo Kang; Jerome Sacks; William J. Welch (ICCAD, 1989)

Statistical design of MOS VLSI circuits with designed experiments - Tat-Kwan Yu (1989)

Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models. - Tat-Kwan Yu; Sung-Mo Kang; Jerome Sacks; William J. Welch (Int. J. Circuit Theory Appl., 1991)