A 2-ns 16K bipolar ECL RAM with reduced word-line voltage swing. - Yasunobu Nakase; Kakutaro Suda; Koichiro Mashiko; Tatsuhiko Ikeda; Shinpei Kayano (IEEE J. Solid State Circuits, 1991)

A voltage compensated series-gate bipolar circuit operating at sub-2 V. - Hisayasu Sato; Kimio Ueda; Nagisa Sasaki; Tatsuhiko Ikeda; Koichiro Mashiko (IEEE J. Solid State Circuits, 1994)

A 1.9-GHz single chip IF transceiver for digital cordless phones. - Hisayasu Sato; Kenichi Kashiwagi; Kazuhito Niwano; Tetsuya Iga; Tatsuhiko Ikeda; Koichiro Mashiko; Tadashi Sumi; Koji Tsuchihashi (IEEE J. Solid State Circuits, 1996)

Recognition of emotional states using voice, face image and thermal image of face. - Tetsuro Kitazoe; Sung-Ill Kim; Yasunari Yoshitomi; Tatsuhiko Ikeda (INTERSPEECH, 2000)

Si-Substrate Modeling toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design. - Toshiki Kanamoto; Tatsuhiko Ikeda; Akira Tsuchiya; Hidetoshi Onodera; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)