An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. - Te-Hsuan Chen; Yu-Ying Hsiao; Yu-Tsao Hsing; Cheng-Wen Wu (VTS, 2009)

Design of stochastic Viterbi decoders for convolutional codes. - Te-Hsuan Chen; John P. Hayes (DDECS, 2013)

Analyzing and controlling accuracy in stochastic circuits. - Te-Hsuan Chen; John P. Hayes (ICCD, 2014)

Behavior of stochastic circuits under severe error conditions. - Te-Hsuan Chen; Armin Alaghi; John P. Hayes (it Inf. Technol., 2014)

Equivalence among stochastic logic circuits and its application. - Te-Hsuan Chen; John P. Hayes (DAC, 2015)

Design of Division Circuits for Stochastic Computing. - Te-Hsuan Chen; John P. Hayes (ISVLSI, 2016)

Hardware Acceleration for Boolean Satisfiability Solver by Applying Belief Propagation Algorithm. - Te-Hsuan Chen; Ju-Yi Lu (CoRR, 2016)

Designing Accurate and Low-Cost Stochastic Circuits. - Te-Hsuan Chen (2016)

Achieving progressive precision in stochastic computing. - Te-Hsuan Chen; Pai-Shun Ting; John P. Hayes (GlobalSIP, 2017)

Equivalence Among Stochastic Logic Circuits and its Application to Synthesis. - Te-Hsuan Chen; John P. Hayes (IEEE Trans. Emerg. Top. Comput., 2019)