Algorithm and Hardware Support for Branch Anticipation. - Ted Zhihong Yu; Edwin Hsing-Mean Sha; Nelson L. Passos; Roy Dz-Ching Ju (Great Lakes Symposium on VLSI, 1997)

RCRS: A Framework for Loop Scheduling with Limited Number of Registers. - Kaisheng Wang; Ted Zhihong Yu; Edwin Hsing-Mean Sha (Great Lakes Symposium on VLSI, 1998)

Loop scheduling algorithms for power reduction. - Ted Zhihong Yu; Fei Chen; Edwin Hsing-Mean Sha (ICASSP, 1998)