A 7.9-14.3GHz -243.3dB FoMT Sub-Sampling PLL with Transformer-Based Dual-Mode VCO in 40nm CMOS. - Yizhuo Wang; Tenghao Zou; Bowen Chen; Shujiang Ji; Chao Zhang; Na Yan (A-SSCC, 2021)

A 6-18GHz Low-Noise Amplifier Using Noise Canceling Technique in 130-nm CMOS PD-SOI. - Jialong Xue; Tenghao Zou; Hao Xu 005; Tingting Han; Mi Tian; Weiqiang Zhu; Zhijian Li; Na Yan (ICTA, 2022)

Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL. - Yizhuo Wang; Jiahe Shi; Hao Xu 005; Shujiang Ji; Yiyun Mao; Tenghao Zou; Jun Tao 001; Hao Min; Na Yan (IEEE J. Solid State Circuits, 2023)

A 6-12 GHz Wideband Low-Noise Amplifier With 0.8-1.5 dB NF and ±0.75 dB Ripple Enabled by the Capacitor Assisting Triple-Winding Transformer. - Tenghao Zou; Hao Xu 005; Yizhuo Wang; Weitian Liu; Tingting Han; Mi Tian; Weiqiang Zhu; Na Yan (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

5.1 A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage Suppression. - Hao Xu 005; Junyan Bi; Tenghao Zou; Weitao He; Yaxin Zeng; Junjie Gu; Ziyang Jiao; Shubin Liu; Zhangming Zhu; Na Yan (ISSCC, 2024)

A 5-18-GHz Reconfigurable Quadrature Receiver With Enhanced I-Q Isolation and 100-500-MHz Baseband Bandwidth. - Junyan Bi; Hao Xu 005; Tenghao Zou; Yaxin Zeng; Yechen Tian; Weitao He; Junjie Gu; Ziyang Jiao; Shubin Liu; Zhangming Zhu; Na Yan (IEEE J. Solid State Circuits, 2025)