A 58mW 1.2mm2 HSDPA Turbo Decoder ASIC in 0.13μm CMOS. - Christian Benkeser; Andreas Burg 001; Teo Cupaiuolo; Qiuting Huang (ISSCC, 2008)

Design and Optimization of an HSDPA Turbo Decoder ASIC. - Christian Benkeser; Andreas Burg 001; Teo Cupaiuolo; Qiuting Huang (IEEE J. Solid State Circuits, 2009)

Low-complexity high throughput VLSI architecture of soft-output ML MIMO detector. - Teo Cupaiuolo; Massimiliano Siti; Alessandro Tomasoni (DATE, 2010)

A Hardware Oriented, Low-Complexity LORD MIMO Detector. - Alessandro Tomasoni; Marco Ferrari 001; Sandro Bellini; Massimiliano Siti; Teo Cupaiuolo (ICC, 2010)

A flexible and fast software implementation of the FFT on the BPE platform. - Teo Cupaiuolo; Daniele Lo Iacono (DATE, 2012)

Power Efficient SDR Implementation of IEEE 802.11a/p Physical Layer. - Daniele Lo Iacono; Teo Cupaiuolo (J. Signal Process. Syst., 2013)

Early Functional Safety and PPA Evaluation of Digital Designs. - Michelangelo Bartolomucci; David Kingston; Teo Cupaiuolo; Alessandra Nardi; Riccardo Cantoro (DATE, 2025)