Designing a branch target buffer for executing branches with zero time cost in a RISC processor. - Jordi Cortadella; Teodor Jové (Microprocess. Microprogramming, 1988)

Dynamic RAM for on-chip instruction caches. - Jordi Cortadella; Teodor Jové (SIGARCH Comput. Archit. News, 1988)

Reduced instruction buffer for RISC architectures. - Teodor Jové; Jordi Cortadella (Microprocessing and Microprogramming, 1989)

Comments on 'Using cache mechanisms to exploit nonrefreshing DRAM's for on-chip memories'. - Jordi Cortadella; Teodor Jové (IEEE J. Solid State Circuits, 1992)

Multiprogrammation of parallel applications on the PAROS operating system kernel. - Jesús Labarta; Judit Giménez; Cristina Pujol; Teodor Jové (PDP, 1993)

Qualitative Reasoning for Admission Control in ATM Networks. - José-Luis Marzo; Antonio Bueno; Ramón Fabregat; Teodor Jové (IEA/AIE (Vol. 1), 1998)

A Dynamic Multilevel MPLS Protection Domain. - Eusebi Calle; Teodor Jové; Pere Vilà; José-Luis Marzo (DRCN, 2001)

A virtual network laboratory for learning IP networking. - Lluís Fàbrega; Jordi Massaguer; Teodor Jové; David Mérida (ITiCSE, 2002)

Throughput guarantees for elastic flows using end-to-end admission control. - Lluís Fàbrega; Teodor Jové; Yezid Donoso Meisel (LANC, 2003)

A Packet Class-Based Scheme for Providing Throughput Guarantees to TCP Flows. - Lluís Fàbrega; Teodor Jové; Pere Vilà; José-Luis Marzo (IPOM, 2005)

Admission Control for TCP Flows Using Packet Classes and Edge-to-edge Measurements of Aggregates. - Lluís Fàbrega; Teodor Jové; Pere Vilà; José-Luis Marzo; Liliana Carrillo (ICC, 2006)

Throughput Guarantees for TCP Flows in a Network Based on Packet Classes Using Edge-to-Edge Per Flow Measurements. - Lluís Fàbrega; Teodor Jové; Pere Vilà; José-Luis Marzo (Simul., 2006)

A guaranteed minimum throughput service for TCP flows using measurement-based admission control. - Lluís Fàbrega; Teodor Jové; Pere Vilà; José-Luis Marzo (Int. J. Commun. Syst., 2007)

A network scheme for TCP elastic traffic with admission control using edge-to-edge per-aggregate measurements in class-based networks. - Lluís Fàbrega; Teodor Jové; Pere Vilà; José-Luis Marzo (J. High Speed Networks, 2011)

Dynamic branch speculation in a speculative parallelization architecture for computer clusters. - Joan Puiggali; Boleslaw K. Szymanski; Teodor Jové; José-Luis Marzo (Concurr. Comput. Pract. Exp., 2013)

A review of the architecture of admission control schemes in the Internet. - Lluís Fàbrega; Teodor Jové (Netw. Protoc. Algorithms, 2013)

Network schemes for TCP elastic traffic in the Internet. - Lluís Fàbrega; Teodor Jové (Netw. Protoc. Algorithms, 2013)

Knowlegde management for co-creating educational material with high ability students, teachers and parents. - Juan Pablo Meneses-Ortegón; Teodor Jové; Ramón Fabregat; Mery Yolima Uribe Rios (EDUCON, 2018)

Co-CreHAs: Co-creation process of enrichment activities for high ability students. - Mery Yolima Uribe Rios; Teodor Jové; Ramón Fabregat; Juan Pablo Meneses-Ortegón (EDUCON, 2018)

Model for Sharing Knowledge in a Co-creation Process with High Ability Students. - Juan Pablo Meneses-Ortegón; Teodor Jové; Ramón Fabregat; Mery Yolima Uribe Rios (WorldCIST (1), 2018)

AdaptHAs: Adapting Theme and Activity Selections for a Co-creation Process for High Ability Students. - Mery Yolima Uribe Rios; Teodor Jové; Ramón Fabregat; Juan Pablo Meneses-Ortegón (WorldCIST (2), 2018)