Design and Implementation of an FPGA-Based Data/Timing Formatter. - Yu-Yi Chen; Jiun-Lang Huang; Terry Kuo; Xuan-Lun Huang (J. Electron. Test., 2015)

Design and Implementation of an EG-Pool Based FPGA Formatter with Temperature Compensation. - Yang-Kai Huang; Kuan-Te Li; Chih-Lung Hsiao; Chia-An Lee; Jiun-Lang Huang; Terry Kuo (ATS, 2017)

Design and Implementation of an FPGA-Based 16-Channel Data/Timing Formatter. - Guan-Hao Hou; Wei-Chen Huang; Jiun-Lang Huang; Terry Kuo (ATS, 2018)

An FPGA-Based Data Receiver for Digital IC Testing. - Wei-Chen Huang; Guan-Hao Hou; Jiun-Lang Huang; Terry Kuo (ITC-Asia, 2019)