A 2000-MOPS embedded RISC processor with a Rambus DRAM controller. - Kazumasa Suzuki; Masayuki Daito; Tomoo Inoue; Kouhei Nadehara; Masahiro Nomura; Masayuki Mizuno; Tomofumi Iima; Shoichiro Sato; Terumi Fukuda; Tomohisa Arai; Ichiro Kuroda; Masakazu Yamashina (IEEE J. Solid State Circuits, 1999)