A 1-V operating 256-kb full-CMOS SRAM. - Akinori Sekiyama; Teruo Seki; Shinji Nagai; Akihiro Iwase; Noriyuki Suzuki; Masato Hayasaka (IEEE J. Solid State Circuits, 1992)

A 6-ns 1-Mb CMOS SRAM with latched sense amplifier. - Teruo Seki; Eisaku Itoh; Chiaki Furukawa; Isamu Maeno; Tadashi Ozawa; Hiroyuki Sano; Noriyuki Suzuki (IEEE J. Solid State Circuits, 1993)