A high performance BiCMOS 32-bit microprocessor. - Yasuhiro Nakatsuka; Takashi Hotta; Shigeya Tanaka; Tadaaki Bandoh; Ryuichi Satomura; Syuichi Nakagami; Tetsuo Nakano; Atsuo Hotta; Takashi Moriyama; Shigemi Adachi; Shoji Iwamoto (ICCD, 1989)

A 70-MHz 32-b microprocessor with 1.0- mu m BiCMOS macrocell library. - Takashi Hotta; Tadaaki Bandoh; Atsuo Hotta; Tetsuo Nakano; Shoji Iwamoto; Shigemi Adachi (IEEE J. Solid State Circuits, 1990)

PLL-based BiCMOS on-chip clock generator for very high-speed microprocessor. - Kozaburo Kurita; Takashi Hotta; Tetsuo Nakano; Nobuaki Kitamura (IEEE J. Solid State Circuits, 1991)

3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor. - Fumio Murabayashi; Takashi Hotta; Shigeya Tanaka; Tatsumi Yamauchi; Hiromichi Yamada; Tetsuo Nakano; Yutaka Kobayashi; Tadaaki Bandoh (IEEE J. Solid State Circuits, 1994)

A 120-MHz BiCMOS superscalar RISC processor. - Shigeya Tanaka; Takashi Hotta; Fumio Murabayashi; Hiromichi Yamada; Shoji Yoshida; Kotaro Shimamura; Koyo Katsura; Tadaaki Bandoh; Koichi Ikeda; Kenji Matsubara; Kouji Saitou; Tetsuo Nakano; et al. (IEEE J. Solid State Circuits, 1994)