An elastic pipeline mechanism by self-timed circuits. - Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyasu Asai; Takio Ohno; Osamu Tomisawa; Tetsuo Yamasaki; Kenji Shima; Katsuhiko Asada; Hiroaki Terada (IEEE J. Solid State Circuits, 1988)

VLSI implementation of a variable-length pipeline scheme for data-driven processors. - Tetsuo Yamasaki; Kenji Shima; Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyasu Asai; Takio Ohno; Osamu Tomisawa; Hiroaki Terada (IEEE J. Solid State Circuits, 1989)

A 40-MFLOPS 32-bit floating-point processor with elastic pipeline scheme. - Shinji Komori; Hidehiro Takata; Todhixuki Tamura; Fumixsdu Asai; Takio Ohno; Osamu Tomisawa; Tetsuo Yamasaki; Kenji Shima; Hiroaki Nishikawa; Hiroaki Terada (IEEE J. Solid State Circuits, 1989)