Parallel Hardware Algorithms with Redundant Number Representations for Multiple-Valued Arithmetic VLSI. - Shoji Kawahito; Y. Mitsui; Makoto Ishida; Tetsuro Nakamura (ISMVL, 1992)

Implementation and design of biosignal optical telemetry system based on enforced synchronization. - Nobuo Karita; Shoji Kawahito; Makoto Ishida; Shiro Usui; Tetsuro Nakamura; Masafumi Nishikado; Shunji Nagaoka (Syst. Comput. Jpn., 1992)

Multi-valued current-mode parallel multiplier based on redundant positive-digit number representations. - Shoui Kaqahito; Makoto Ishida; Tetsuro Nakamura; Kentaro Mizuno; Michitaka Kameyama; Tatsuo Higuchi 001 (Syst. Comput. Jpn., 1993)

A CMOS integrated circuit for multichannel multiple-subject biotelemetry using bidirectional optical transmissions [weightlessness in space effects application]. - Shoji Kawahito; Susumu Ueda; Maloto Ishida; Tetsuro Nakamura; Shiro Usui; Shunji Nagaoka (IEEE Trans. Biomed. Eng., 1994)

High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits. - Shoji Kawahito; Makoto Ishida; Tetsuro Nakamura; Michitaka Kameyama; Tatsuo Higuchi 001 (IEEE Trans. Computers, 1994)

Time-Division Multiplexing for FPGA Considering CNN Model Switch Time. - Tetsuro Nakamura; Shogo Saito; Kei Fujimoto; Masashi Kaneko; Akinori Shiraga (IPDPS Workshops, 2021)

Spatial- and time- division multiplexing in CNN accelerator. - Tetsuro Nakamura; Shogo Saito; Kei Fujimoto; Masashi Kaneko; Akinori Shiraga (Parallel Comput., 2022)

Comparison of Calculation Modes for Virtual Co-embodiment: Movement Average and Vector Summation. - Marie M. Morita; Yuji Fujihara; Tetsuro Nakamura; Miki Matsumuro; Fumihisa Shibata; Asako Kimura; Norimichi Kitagawa (VR Workshops, 2025)