High performance and cost effective memory architecture for an HDTV decoder LSI. - Tetsuro Takizawa; Junji Tajime; Hidenobu Harasaki (ICASSP, 1999)

Memory Compression Method Considering Memory Bandwidth for Hdtv Decoder Lsis. - Junji Tajime; Tetsuro Takizawa; Satoshi Nogaki; Hidenobu Harasaki (ICIP (2), 1999)

An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder. - Tetsuro Takizawa; Masao Hirasawa (IEEE Trans. Consumer Electron., 2001)