VLSI Design and System Level Verification for the Mini-Disc. - Tetsuya Fujimoto; Takashi Kambe (DAC, 1996)

A Scheduling Method for Synchronous Communication in the Bach Hardware Compiler. - Ryoji Sakurai; Mizuki Takahashi; Andrew Kay; Akihisa Yamada 001; Tetsuya Fujimoto; Takashi Kambe (ASP-DAC, 1999)

A soft-error hardened latch scheme for SoC in a 90 nm technology and beyond. - Yoshihide Komatsu; Yukio Arima; Tetsuya Fujimoto; Takahiro Yamashita; Koichiro Ishibashi (CICC, 2004)

Power Valve: for low power operation and low stand-by power. - Takahiro Yamashita; Tetsuya Fujimoto; Koichiro Ishibashi (IEICE Electron. Express, 2005)

Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. - Koichiro Ishibashi; Tetsuya Fujimoto; Takahiro Yamashita; Hiroyuki Okada; Yukio Arima; Yasuyuki Hashimoto; Kohji Sakata; Isao Minematsu; Yasuo Itoh; Haruki Toda; Motoi Ichihashi; Yoshihide Komatsu; et al. (IEICE Trans. Electron., 2006)

Positive and Negative Effects of Environmental Chemicals on Brain Function in Rodents. - Tomoko Tsuruoka; Tetsuya Fujimoto; Noboru Shiota; Makoto Monda; Yukiko Fueta; Toru Ishidao; Hajime Hori; Shuji Aou (Brain-Inspired Information Technology, 2010)