Scalable GA processor architecture and its implementation of processor-element. - Tetsuya Imai; Masaya Yoshikawa; Hidekazu Terai; Hironori Yamauchi (ICASSP, 2002)

VLSI processor architecture for real-time GA processing and PE-VLSI design. - Tetsuya Imai; Masaya Yoshikawa; Hidekazu Terai; Hironori Yamauchi (ISCAS (3), 2004)