Compact 12-port multi-bank register file test-chip in 0.35µm CMOS for highly parallel processors. - Tetsuya Sueyoshi; Hiroshi Uchida; Hans Jürgen Mattausch; Tetsushi Koide; Yosuke Mitani; Tetsuo Hironaka (ASP-DAC, 2004)

Design of superscalar processor with multi-bank register file. - Tadashi Saito 002; Moto Maeda; Tetsuo Hironaka; Kazuya Tanigawa; Tetsuya Sueyoshi; Ken-ichi Aoyama; Tetsushi Koide; Hans Jürgen Mattausch (ISCAS (4), 2005)