A transputer based vehicle simulator. - Thambipillai Srikanthan; Kai-Yun Chan; Hock Soon Seah; S. K. Leong (Microprocess. Microsystems, 1995)

An Efficient Adaptive Routing Strategy for Network Management Protocol. - Thambipillai Srikanthan; Gurdeep Singh Hura (ESM, 1996)

An efficient adaptive routing algorithm for a network management system. - Thambipillai Srikanthan; Gurdeep S. Hura 001 (Comput. Commun., 1997)

An Object Oriented GUI for Clustering Technique Based Network Simulations. - Thambipillai Srikanthan; Gurdeep S. Hura 001; Chia Cher Yong (ESM, 1998)

Designing efficient residue arithmetic based VLSI correlators. - Aniruddha A. Deodhar; Manish Bhardwaj; Christopher T. Clarke; Thambipillai Srikanthan (ICASSP, 1998)

An Internet application for on-line banking. - S. K. Leong; Thambipillai Srikanthan; Gurdeep S. Hura 001 (Comput. Commun., 1998)

An OLE-based speech compression system for multimedia applications. - Thambipillai Srikanthan; Goh Wee Leng; S. K. Amarasinghe (Microprocess. Microsystems, 1998)

A Reverse Converter for the 4-moduli Superset {2n-1, 2n, 2n+1, 2n+1+1}. - Manish Bhardwaj; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Symposium on Computer Arithmetic, 1999)

VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv. - Manish Bhardwaj; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Symposium on Computer Arithmetic, 1999)

New area efficient residue-to-weighted number system converters. - Jimson Mathew; D. Radhakrishnan; Thambipillai Srikanthan (ICECS, 1999)

LSP parameter interpretation for speech classification. - Ian Vince McLoughlin; Srikanthan Thambipillai (ICECS, 1999)

Residue-to-binary arithmetic converter for moduli set {2n -1, 2n, 2n+1, 2n+1 -1}. - Jimson Mathew; D. Radhakrishnan; Thambipillai Srikanthan (NSIP, 1999)

A pipelined architecture for image segmentation by adaptive progressive thresholding. - K. Vijayan Asari; Thambipillai Srikanthan; Sanjiv Kumar; D. Radhakrishnan (Microprocess. Microsystems, 1999)

A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition. - Bimal Gisutham; Thambipillai Srikanthan; Vijayan K. Asari (CAMP, 2000)

A Robust Parallel Architecture for Adaptive Color Quantization. - Babu Mailachalam; Thambipillai Srikanthan (ITCC, 2000)

Dynamic multicast routing in VLSI. - Siew Kei Lam; Thambipillai Srikanthan (Comput. Commun., 2000)

A Recursive Otsu-Iris Filter Technique for High-Speed Detection of Lumen Region from Endoscopic Images. - Hui Tian; Thambipillai Srikanthan; Vijayan K. Asari (AIPR, 2001)

High-Speed Environment Representation Scheme for Dynamic Path Planning. - Siew Kei Lam; Thambipillai Srikanthan (J. Intell. Robotic Syst., 2001)

Network Simulation Environment (NSE): A Generic Framework for Network Graphs. - Gurdeep S. Hura 001; Thambipillai Srikanthan; Chia Cher Yong (Telecommun. Syst., 2001)

A MSB-biased self-organizing feature map for still color image compression. - Chip-Hong Chang; Rui Xiao; Thambipillai Srikanthan (APCCAS (2), 2002)

Incorporating area-time flexibility to a binary signed-digit adder. - Siew Kei Lam; Thambipillai Srikanthan; Nitin Goyal; Neeraj Tyagi (APCCAS (1), 2002)

Fuzzy-ART based image compression for hardware implementation. - C. S. Lim; Thambipillai Srikanthan; Vijayan K. Asari; Siew Kei Lam (APCCAS (2), 2002)

An efficient architecture for adaptive progressive thresholding. - Hui Tian; Siew Kei Lam; Thambipillai Srikanthan; Chip-Hong Chang (APCCAS (1), 2002)

New Architecture and Algorithms for Degradable VLSI/WSI Arrays. - Wu Jigang; Heiko Schröder; Thambipillai Srikanthan (COCOON, 2002)

On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization. - Rui Xiao; Chip-Hong Chang; Thambipillai Srikanthan (DELTA, 2002)

Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking. - C. S. Lim; Saman S. Abeysekera; Thambipillai Srikanthan; S. K. Amarasinghe (ISCAS (1), 2002)

A Hardware Efficient Technique for Rapid Lumen Segmentation from Endoscopic Images. - Hui Tian; Thambipillai Srikanthan; Vijayan K. Asari (JCIS, 2002)

Load Sharing in Large Scale Distributed Systems: A Novel Approach. - Gurdeep S. Hura 001; Sheeja Mohan; Thambipillai Srikanthan (PDPTA, 2002)

Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction. - Hui Tian; Thambipillai Srikanthan; Vijayan K. Asari; Siew Kei Lam (SSIAI, 2002)

Optimizing Scaling Factor Computations in Flat Cordic. - Thambipillai Srikanthan; Bimal Gisuthan (J. Circuits Syst. Comput., 2002)

Field programable gate array based architecture for real time image segmentation by region growing algorithm. - Chip-Hong Chang; Hui Tian; Thambipillai Srikanthan; Chai-Soon Lim (J. Electronic Imaging, 2002)

On Load Sharing in Distributed Systems: a Novel Approach. - Gurdeep S. Hura 001; Sheeja Mohan; Thambipillai Srikanthan (Trans. SDPS, 2002)

Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method. - Siew Kei Lam; Thambipillai Srikanthan (J. Intell. Robotic Syst., 2002)

Segmenting endoscopic images using adaptive progressive thresholding: a hardware perspective. - Vijayan K. Asari; Thambipillai Srikanthan (J. Syst. Archit., 2002)

A linear approximation based hybrid approach for binary logarithmic conversion. - Siew Kei Lam; Thambipillai Srikanthan (Microprocess. Microsystems, 2002)

Area-time issues in the VLSI implementation of self organizing map neural networks. - Babu Mailachalam; Thambipillai Srikanthan (Microprocess. Microsystems, 2002)

A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators. - Thambipillai Srikanthan; Bimal Gisuthan (Microprocess. Microsystems, 2002)

Heuristic techniques for accelerating hierarchical routing on road networks. - George Rosario Jagadeesh; Thambipillai Srikanthan; K. H. Quek (IEEE Trans. Intell. Transp. Syst., 2002)

A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays. - Wu Jigang; Thambipillai Srikanthan; Chandni R. Patel (Embedded Systems and Applications, 2003)

Low-Power Transform-Domain Coding by Separable Two-Dimensional Hartley-Like Transform. - Pramod Kumar Meher; Thambipillai Srikanthan; M. Mahesh Kumar; S. Arunkumar (Embedded Systems and Applications, 2003)

Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke; Saurav Bhattacharyya (Embedded Systems and Applications, 2003)

An adaptive initialization technique for color quantization by self organizing feature map. - Chip-Hong Chang; Rui Xiao; Thambipillai Srikanthan (ICASSP (3), 2003)

Vector quantization techniques for GMM based speaker verification. - Gurmeet Singh; Ashish Panda; Saurav Bhattacharyya; Thambipillai Srikanthan (ICASSP (2), 2003)

On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays. - Wu Jigang; Thambipillai Srikanthan (International Conference on Computational Science, 2003)

New efficient residue-to-binary converters for 4-moduli set {2n - 1, 2n, 2n + 1, 2n+1 - 1}. - Bin Cao; Chip-Hong Chang; Thambipillai Srikanthan (ISCAS (4), 2003)

Design of a high speed reverse converter for a new 4-moduli set residue number system. - Bin Cao; Thambipillai Srikanthan; Chip-Hong Chang (ISCAS (4), 2003)

Partial rerouting algorithm for reconfigurable VLSI arrays. - Wu Jigang; Thambipillai Srikanthan (ISCAS (5), 2003)

Low cost logarithmic techniques for high-precision computations. - Siew Kei Lam; Devendra K. Chaudhaiy; Thambipillai Srikanthan (ISCAS (5), 2003)

Architectural design and analysis toolbox to implement shortest path algorithms in hardware. - K. H. Quek; Siew Kei Lam; N. K. Agrawal; Thambipillai Srikanthan (ISCAS (3), 2003)

Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit. - Hui Tian; Siew Kei Lam; Thambipillai Srikanthan (ISCAS (4), 2003)

Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya; Prasanna Venkatesh Kannan (IWSOC, 2003)

A Run-time Reconfiguration Algorithm for VLSI Arrays. - Wu Jigang; Thambipillai Srikanthan (VLSI Design, 2003)

An improved reconfiguration algorithm for degradable VLSI/WSI arrays. - Wu Jigang; Thambipillai Srikanthan (J. Syst. Archit., 2003)

A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation. - N. Sudha; Thambipillai Srikanthan; Babu Mailachalam (J. Syst. Archit., 2003)

Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays. - Wu Jigang; Thambipillai Srikanthan (Asia-Pacific Computer Systems Architecture Conference, 2004)

Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya (ASP-DAC, 2004)

Dynamic Filter Cache for Low Power Instruction Memory Hierarchy. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya (DSD, 2004)

RTOS acceleration on soft-core processors using instruction set customization. - Jin Zhenyu; Mohit Sindhwani; Thambipillai Srikanthan (FPT, 2004)

Knapsack Model and Algorithm for HW/SW Partitioning Problem. - Abhijit Ray; Wu Jigang; Thambipillai Srikanthan (International Conference on Computational Science, 2004)

High-throughput image rotation using sign-prediction based redundant cordic algorithm. - Suchitra Sathyanarayana; Siew Kei Lam; Thambipillai Srikanthan (ICIP, 2004)

Design of residue-to-binary converter for a new 5-moduli superset residue number system. - Bin Cao; Thambipillai Srikanthan; Chip-Hong Chang (ISCAS (2), 2004)

Fast reconfiguring mesh-connected VLSI arrays. - Wu Jigang; Thambipillai Srikanthan (ISCAS (2), 2004)

A novel distributed cluster maintenance technique for high mobility ad-hoc networks. - Gayathri Venkataraman; Sabu Emmanuel; Srikanthan Thambipillai (ISWCS, 2004)

Knapsack Model and Algorithm for Hardware/Software Partitioning Problem. - Abhijit Ray; Wu Jigang; Thambipillai Srikanthan (Comput. Artif. Intell., 2004)

An efficient data structure for branch-and-bound algorithm. - Wu Jigang; Thambipillai Srikanthan (Inf. Sci., 2004)

Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System. - Thambipillai Srikanthan; Siew Kei Lam; Mishra Suman (IEEE Trans. Computers, 2004)

Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction. - Siew Kei Lam; K. Sridharan 001; Thambipillai Srikanthan (IEEE Trans. Ind. Electron., 2004)

Minimizing Power in Hardware/Software Partitioning. - Wu Jigang; Thambipillai Srikanthan; Chengbin Yan (Asia-Pacific Computer Systems Architecture Conference, 2005)

Morphable Structures for Reconfigurable Instruction Set Processors. - Siew Kei Lam; Yun Deng; Thambipillai Srikanthan (Asia-Pacific Computer Systems Architecture Conference, 2005)

Efficient Techniques and Hardware Analysis for Mesh-Connected Processors. - Wu Jigang; Thambipillai Srikanthan; Heiko Schröder (ICA3PP, 2005)

A new formulation of fast diminished-one multioperand modulo 2n/+1 adder. - Bin Cao; Chip-Hong Chang; Thambipillai Srikanthan (ISCAS (1), 2005)

A new design method to modulo 2n-1 squaring. - Bin Cao; Thambipillai Srikanthan; Chip-Hong Chang (ISCAS (1), 2005)

A configurable dual moduli multi-operand modulo adder. - Chip-Hong Chang; Shibu Menon; Bin Cao; Thambipillai Srikanthan (ISCAS (2), 2005)

Elimination of sign precomputation in flat CORDIC. - Suchitra Sathyanarayana; S. Sukthankar; Thambipillai Srikanthan; Christopher T. Clarke (ISCAS (4), 2005)

Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications]. - Yi Wang 016; Jussipekka Leiwo; Thambipillai Srikanthan (ISCAS (2), 2005)

DASCA: A Degree and Size based Clustering Approach for Wireless Sensor Networks. - Gayathri Venkataraman; Sabu Emmanuel; Srikanthan Thambipillai (ISWCS, 2005)

Practical Techniques for Performance Estimation of Processors. - Abhijit Ray; Thambipillai Srikanthan; Wu Jigang (IWSOC, 2005)

Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems. - Kugan Vivekanandarajah; Thambipillai Srikanthan (IEEE International Workshop on Rapid System Prototyping, 2005)

Power Efficient Sub-Array in Reconfigurable VLSI Meshes. - Wu Jigang; Thambipillai Srikanthan (J. Comput. Sci. Technol., 2005)

VLSI-efficient schemes for high-speed construction of tangent graph. - Siew Kei Lam; K. Sridharan 001; Thambipillai Srikanthan (Robotics Auton. Syst., 2005)

New adaptive color quantization method based on self-organizing maps. - Chip-Hong Chang; Pengfei Xu 009; Rui Xiao; Thambipillai Srikanthan (IEEE Trans. Neural Networks, 2005)

Efficient reconfigurable techniques for VLSI arrays with 6-port switches. - Wu Jigang; Thambipillai Srikanthan; Heiko Schröder (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area. - Wu Jigang; Thambipillai Srikanthan (APCCAS, 2006)

New Reconfiguration Algorithm for Degradable VLSI Arrays. - Wu Jigang; Thambipillai Srikanthan; Xiaodong Wang (APCCAS, 2006)

An Efficient Algorithm for DPA-resistent RSA. - Yi Wang 016; Jussipekka Leiwo; Thambipillai Srikanthan; Luo Jianwen (APCCAS, 2006)

Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems. - Yi Wang 016; Douglas L. Maskell; Jussipekka Leiwo; Thambipillai Srikanthan (APCCAS, 2006)

Design considerations for multi-radio co-existence on asynchronous processors using LAD extensions. - Dipnarayan Guha; Kugan Vivekanandarajah; Thambipillai Srikanthan (CISS, 2006)

Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors. - Siew Kei Lam; Mohammed Shoaib; Thambipillai Srikanthan (DELTA, 2006)

Energy Efficient Cache Tuning with Performance Bound. - Leipo Yan; Siew Kei Lam; Thambipillai Srikanthan; Wu Jigang (DELTA, 2006)

Efficient algorithm for functional scheduling in hardware/software co-design. - Wu Jigang; Thambipillai Srikanthan; Tao Jiao (FPT, 2006)

Efficient management of custom instructions for run-time reconfigurable instruction set processors. - Siew Kei Lam; Bharathi N. Krishnan; Thambipillai Srikanthan (FPT, 2006)

Low Area-time Complexity Averaging Scheme for Thumbnail Generation. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (ICARCV, 2006)

Profile Directed Instruction Cache Tuning for Embedded Systems. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke (ISVLSI, 2006)

FPGA based DPA-resistant Unified Architecture for Signcryption. - Yi Wang 016; Jussipekka Leiwo; Thambipillai Srikanthan; Yu Yu 001 (ITNG, 2006)

Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. - Leipo Yan; Thambipillai Srikanthan; Niu Gang (LCTES, 2006)

Efficient Architectures for Segmentation of Endoscopic Images in Micro-Robotic Auto Navigation Systems. - C. S. Lim; Siew Kei Lam; Hui Tian; Thambipillai Srikanthan (Int. J. Humanoid Robotics, 2006)

Low-complex dynamic programming algorithm for hardware/software partitioning. - Wu Jigang; Thambipillai Srikanthan (Inf. Process. Lett., 2006)

An efficient algorithm for the collapsing knapsack problem. - Wu Jigang; Thambipillai Srikanthan (Inf. Sci., 2006)

Rapid generation of custom instructions using predefined dataflow structures. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (Microprocess. Microsystems, 2006)

Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches. - Wu Jigang; Thambipillai Srikanthan (IEEE Trans. Computers, 2006)

Scalable and modular memory-based systolic architectures for discrete Hartley transform. - Pramod Kumar Meher; Thambipillai Srikanthan; Jagdish Chandra Patra (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Algorithmic aspects of area-efficient hardware/software partitioning. - Wu Jigang; Thambipillai Srikanthan (J. Supercomput., 2006)

Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors. - Siew Kei Lam; Thambipillai Srikanthan (ASAP, 2007)

Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors. - Xiongfei Liao; Wu Jigang; Thambipillai Srikanthan (ASAP, 2007)

Reconfigurable Frame Parser Design for Multi-Radio Support on Asynchronous Microprocessor Cores. - Dipnarayan Guha; Thambipillai Srikanthan (ICCTA, 2007)

Improved Spectral Subtraction Technique for Text-Independent Speaker Verification. - Ashish Panda; Neha Tripathi; Thambipillai Srikanthan (DSP, 2007)

Unified Cordic Based Processor for Image Processing. - Suchitra Sathyanarayana; Ravi Kumar Satzoda; Srikanthan Thambipillai (DSP, 2007)

Real Time Tracking of Camera Motion Through Cylindrical Passages. - Suchitra Sathyanarayana; Srikanthan Thambipillai; Christopher T. Clarke (DSP, 2007)

An Embedded Systems graduate education for Singapore. - Ian McLoughlin 001; Douglas L. Maskell; Thambipillai Srikanthan; Wooi-Boon Goh (ICPADS, 2007)

A Cluster-Based Approach to Fault Detection and Recovery in Wireless Sensor Networks. - Gayathri Venkataraman; Sabu Emmanuel; Srikanthan Thambipillai (ISWCS, 2007)

One-dimensional Search Algorithms for Hardware/Software Partitioning. - Wu Jigang; Thambipillai Srikanthan; Guang Chen (MEMOCODE, 2007)

Size-restricted cluster formation and cluster maintenance technique for mobile ad hoc networks. - Gayathri Venkataraman; Sabu Emmanuel; Thambipillai Srikanthan (Int. J. Netw. Manag., 2007)

Rapid Area-Time Estimation Technique for Porting C-based Applications onto FPGA platforms. - Lieu My Chuong; Siew Kei Lam; Thambipillai Srikanthan (Scalable Comput. Pract. Exp., 2007)

Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches. - Wu Jigang; Thambipillai Srikanthan; Xiaodong Wang (IEEE Trans. Computers, 2007)

A Residue-to-Binary Converter for a New Five-Moduli Set. - Bin Cao; Chip-Hong Chang; Thambipillai Srikanthan (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Rapid estimation of instruction cache hit rates using loop profiling. - Santanu Kumar Dash 001; Thambipillai Srikanthan (ASAP, 2008)

A Short Course on Implementing FPGA Based Digital Systems. - George Rosario Jagadeesh; Siew Kei Lam; Thambipillai Srikanthan (ICPADS, 2008)

Performance Estimation: IPC. - Abhijit Ray; Wu Jigang; Thambipillai Srikanthan (ICYCS, 2008)

Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays. - Wu Jigang; Thambipillai Srikanthan; Kai Wang (ISCAS, 2008)

A temperature-aware virtual submesh allocation scheme for noc-based manycore chips. - Xiongfei Liao; Wu Jigang; Thambipillai Srikanthan (SPAA, 2008)

Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design. - Wu Jigang; Thambipillai Srikanthan; Tao Jiao (Des. Autom. Embed. Syst., 2008)

Energy-efficient cluster-based scheme for failure management in sensor networks. - Gayathri Venkataraman; Sabu Emmanuel; Thambipillai Srikanthan (IET Commun., 2008)

Compiler Back End Design for Translating Multi-radio Descriptions to Operating System-less Asynchronous Processor Datapaths. - Dipnarayan Guha; Thambipillai Srikanthan (J. Comput., 2008)

New Model and Algorithm for Hardware/Software Partitioning. - Jigang Wu; Thambipillai Srikanthan; Guang-Wei Zou (J. Comput. Sci. Technol., 2008)

Algorithmic aspects for power-efficient hardware/software partitioning. - Jigang Wu; Thambipillai Srikanthan; Chengbin Yan (Math. Comput. Simul., 2008)

Parallelizing the Hough Transform Computation. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (IEEE Signal Process. Lett., 2008)

A Hybrid Branch-and-Bound Strategy for Hardware/Software Partitioning. - Wu Jigang; Baofang Chang; Thambipillai Srikanthan (ACIS-ICIS, 2009)

Efficient Approximate Algorithm for Hardware/Software Partitioning. - Wu Jigang; Ting Lei; Thambipillai Srikanthan (ACIS-ICIS, 2009)

Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. - Tao Li 008; Wu Jigang; Siew Kei Lam; Thambipillai Srikanthan; Xicheng Lu (ACIS-ICIS, 2009)

A Parallel Paths Communication Technique for Energy Efficient Wireless Sensor Networks. - Balasaravanan Venugopal; Gayathri Venkataraman; Thambipillai Srikanthan (ADHOCNETS, 2009)

Mapping Algorithms for NoC-Based Heterogeneous MPSoC Platforms. - Amit Kumar Singh 002; Wu Jigang; Alok Prakash; Thambipillai Srikanthan (DSD, 2009)

Rapid design exploration framework for application-aware customization of soft core processors. - Alok Prakash; Siew Kei Lam; Amit Kumar Singh 002; Thambipillai Srikanthan (FPL, 2009)

Gradient angle histograms for efficient linear Hough transform. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (ICIP, 2009)

Modeling RTOS Components for Instruction Cache Hit Rate Estimation. - Santanu Kumar Dash 001; Thambipillai Srikanthan (ISCAS, 2009)

Techniques for Area-time Efficient Image Rotation. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (ISCAS, 2009)

Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA. - Lieu My Chuong; Siew Kei Lam; Thambipillai Srikanthan (IEEE International Workshop on Rapid System Prototyping, 2009)

Efficient Heuristics for Minimizing Communication Overhead in NoC-based Heterogeneous MPSoC Platforms. - Amit Kumar Singh 002; Wu Jigang; Alok Prakash; Thambipillai Srikanthan (IEEE International Workshop on Rapid System Prototyping, 2009)

Minimizing interconnect length on reconfigurable meshes. - Jigang Wu; Thambipillai Srikanthan; Kai Wang (Frontiers Comput. Sci. China, 2009)

Run-time management of custom instructions on a partially reconfigurable architecture. - Siew Kei Lam; Huang Fan; Thambipillai Srikanthan; Wu Jigang (Int. J. Inf. Commun. Technol., 2009)

Rapid design of area-efficient custom instructions for reconfigurable embedded processing. - Siew Kei Lam; Thambipillai Srikanthan (J. Syst. Archit., 2009)

Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable Architectures. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Trans. Ind. Electron., 2009)

Exploiting Inherent Parallelisms for Accelerating Linear Hough Transform. - Suchitra Sathyanarayana; Ravi Kumar Satzoda; Thambipillai Srikanthan (IEEE Trans. Image Process., 2009)

Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations. - Siew Kei Lam; Yun Deng; Jian Hu; Xilong Zhou; Thambipillai Srikanthan (ARC, 2010)

Architecture-Aware Custom Instruction Generation for Reconfigurable Processors. - Alok Prakash; Siew Kei Lam; Amit Kumar Singh 002; Thambipillai Srikanthan (ARC, 2010)

Accelerating shortest path computations in hardware. - Siew Kei Lam; Thambipillai Srikanthan (CASE, 2010)

Performance estimation framework for FPGA-based processors. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (FPT, 2010)

Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. - Amit Kumar Singh 002; Akash Kumar 001; Thambipillai Srikanthan; Yajun Ha (FPT, 2010)

An efficient edge and corner detector. - Song Yang; Siew Kei Lam; Thambipillai Srikanthan (ICARCV, 2010)

A Novel Approach for Multilevel Fixed Outline Floorplanning. - Baofang Chang; Wu Jigang; Thambipillai Srikanthan; Lian Li (PAAP, 2010)

Rapid Techniques for Performance Estimation of Processors. - Abhijit Ray; Thambipillai Srikanthan; Wu Jigang (J. Res. Pract. Inf. Technol., 2010)

Hierarchical Additive Hough Transform for Lane Detection. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan; Supriya Sathyanarayana (IEEE Embed. Syst. Lett., 2010)

Instruction cache tuning for embedded multitasking applications. - Santanu Kumar Dash 001; Thambipillai Srikanthan (IET Comput. Digit. Tech., 2010)

Selecting profitable custom instructions for reconfigurable processors. - Tao Li 008; Wu Jigang; Siew Kei Lam; Thambipillai Srikanthan; Xicheng Lu (J. Syst. Archit., 2010)

Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms. - Amit Kumar Singh 002; Thambipillai Srikanthan; Akash Kumar 001; Wu Jigang (J. Syst. Archit., 2010)

Efficient heuristic algorithms for path-based hardware/software partitioning. - Jigang Wu; Thambipillai Srikanthan; Ting Lei (Math. Comput. Model., 2010)

Run-time mapping of multiple communicating tasks on MPSoC platforms. - Amit Kumar Singh 002; Wu Jigang; Akash Kumar 001; Thambipillai Srikanthan (ICCS, 2010)

Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms. - Wu Jigang; Thambipillai Srikanthan; Guang Chen (IEEE Trans. Computers, 2010)

Preprocessing and Partial Rerouting Techniques for Accelerating Reconfiguration of Degradable VLSI Arrays. - Jigang Wu; Thambipillai Srikanthan; Xiaogang Han (IEEE Trans. Very Large Scale Integr. Syst., 2010)

A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs. - Amit Kumar Singh 002; Akash Kumar 001; Thambipillai Srikanthan (CASES, 2011)

A Low-Complexity Speaker-and-Word Recognition Application for Resource-Constrained Devices. - George Rosario Dhinesh; George Rosario Jagadeesh; Thambipillai Srikanthan (ISED, 2011)

Preprocessing-Based Run-Time Mapping of Applications on NoC-based MPSoCs. - Samarth Kaushik; Amit Kumar Singh 002; Thambipillai Srikanthan (ISVLSI, 2011)

A Design Space Exploration Methodology for Application Specific MPSoC Design. - Amit Kumar Singh 002; Akash Kumar 001; Thambipillai Srikanthan (ISVLSI, 2011)

A Novel Binding Algorithm to Reduce Critical Path Delay During High Level Synthesis. - Sharad Sinha; Udit Dhawan; Siew Kei Lam; Thambipillai Srikanthan (ISVLSI, 2011)

Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration. - Lieu My Chuong; Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan; Chai-Soon Lim (PAAP, 2011)

Run-Time Computation and Communication Aware Mapping Heuristic for NoC-Based Heterogeneous MPSoC Platforms. - Samarth Kaushik; Amit Kumar Singh 002; Wu Jigang; Thambipillai Srikanthan (PAAP, 2011)

Utilizing Dark Features for Iris Recognition in Less Constrained Environments. - Bo Liu; Siew Kei Lam; Thambipillai Srikanthan; Weiqi Yuan (PAAP, 2011)

Communication-Aware Design Space Exploration for Efficient Run-Time MPSoC Management. - Amit Kumar Singh 002; Akash Kumar 001; Wu Jigang; Thambipillai Srikanthan (PAAP, 2011)

Compiler-assisted technique for rapid performance estimation of FPGA-based processors. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (SoCC, 2011)

Computation and communication aware run-time mapping for NoC-based MPSoC platforms. - Samarth Kaushik; Amit Kumar Singh 002; Thambipillai Srikanthan (SoCC, 2011)

Instruction set customization for area-constrained FPGA designs. - Alok Prakash; Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (SoCC, 2011)

Accelerating identification of custom instructions for extensible processors. - Tao Li 008; Jigang Wu; Yun Deng; Thambipillai Srikanthan; Xicheng Lu (IET Circuits Devices Syst., 2011)

Field programmable gate array-based acceleration of shortest-path computation. - George Rosario Jagadeesh; Thambipillai Srikanthan; C. M. Lim (IET Comput. Digit. Tech., 2011)

Algorithm for Time-dependent Shortest Safe Path on Transportation Networks. - Jigang Wu; Song Jin; Haikun Ji; Thambipillai Srikanthan (ICCS, 2011)

Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Trans. Computers, 2011)

A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM. - Xiongfei Liao; Wu Jigang; Thambipillai Srikanthan (Trans. High Perform. Embed. Archit. Compil., 2011)

Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms. - Xiongfei Liao; Thambipillai Srikanthan (ACM Trans. Design Autom. Electr. Syst., 2011)

Custom instructions with local memory elements without expensive DMA transfers. - Alok Prakash; Christopher T. Clarke; Thambipillai Srikanthan (FPL, 2012)

Dataflow graph partitioning for high level synthesis. - Sharad Sinha; Thambipillai Srikanthan (FPL, 2012)

Area-time estimation of C-based functions for design space exploration. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (FPT, 2012)

Reconfiguration Algorithms for Degradable VLSI Arrays with Switch Faults. - Yuanbo Zhu; Jigang Wu; Siew Kei Lam; Thambipillai Srikanthan (ICPADS, 2012)

Exploiting stable features for iris recognition of defocused images. - Bo Liu; Siew Kei Lam; Thambipillai Srikanthan; Weiqi Yuan (ISCAS, 2012)

Low-complexity pruning for accelerating corner detection. - Meiqing Wu; Nirmala Ramakrishnan; Siew Kei Lam; Thambipillai Srikanthan (ISCAS, 2012)

Detection & classification of arrow markings on roads using signed edge signatures. - Suchitra Sathyanarayana; Ravi Kumar Satzoda; Thambipillai Srikanthan (Intelligent Vehicles Symposium, 2012)

Robust extraction of lane markings using gradient angle histograms and directional signed edges. - Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (Intelligent Vehicles Symposium, 2012)

Algorithmic aspects for multiple-choice hardware/software partitioning. - Jigang Wu; Qiqiang Sun; Thambipillai Srikanthan (Comput. Oper. Res., 2012)

Iris Recognition of Defocused Images for Mobile phones. - Bo Liu; Siew Kei Lam; Thambipillai Srikanthan; Weiqi Yuan (Int. J. Pattern Recognit. Artif. Intell., 2012)

Psychoacoustic Model Compensation for Robust Speaker Verification in Environmental Noise. - Ashish Panda; Thambipillai Srikanthan (IEEE Trans. Speech Audio Process., 2012)

Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs. - Amit Kumar Singh 002; Akash Kumar 001; Thambipillai Srikanthan (ACM Trans. Design Autom. Electr. Syst., 2012)

Modelling communication overhead for accessing local memories in hardware accelerators. - Alok Prakash; Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (ASAP, 2013)

Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays. - Yuanbo Zhu; Jigang Wu; Siew Kei Lam; Thambipillai Srikanthan (ISCAS, 2013)

Hardware-Software Codesign of EKF-Based Motor Control for Domain-Specific Reconfigurable Platform. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (ISED, 2013)

Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms. - Gaurav Mishra; Yan Lin Aung; Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (ISED, 2013)

Identifying lane types: A modular approach. - Suchitra Suchitra; Ravi Kumar Satzoda; Thambipillai Srikanthan (ITSC, 2013)

Additive Hough Transform on embedded computing platforms. - Shantanu S. Sinha; Ravi Kumar Satzoda; S. Suchitra; Thambipillai Srikanthan (MWSCAS, 2013)

Block-Based Search Space Reduction Technique for Face Detection Using Shoulder and Head Curves. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (PSIVT, 2013)

CADSE: communication aware design space exploration for efficient run-time MPSoC management. - Amit Kumar Singh 002; Akash Kumar 001; Jigang Wu; Thambipillai Srikanthan (Frontiers Comput. Sci., 2013)

Iris Recognition Using Stable Dark Features. - Bo Liu; Siew Kei Lam; Thambipillai Srikanthan; Weiqi Yuan (J. Comput., 2013)

FPGA-aware techniques for rapid generation of profitable custom instructions. - Alok Prakash; Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (Microprocess. Microsystems, 2013)

Perceptual Full-Reference Quality Assessment of Stereoscopic Images by Considering Binocular Visual Characteristics. - Feng Shao 001; Weisi Lin; Shanbo Gu; Gangyi Jiang; Thambipillai Srikanthan (IEEE Trans. Image Process., 2013)

Efficient heuristic and tabu search for hardware/software partitioning. - Jigang Wu; Pu Wang; Siew Kei Lam; Thambipillai Srikanthan (J. Supercomput., 2013)

Automated thresholding for low-complexity corner detection. - Nirmala Ramakrishnan; Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (AHS, 2014)

Soft error mitigation through selection of noninvert implication paths. - Bin Zhou; Thambipillai Srikanthan; Wei Zhang 012 (AHS, 2014)

A low cost acceleration method for hardware trojan detection based on fan-out cone analysis. - Bin Zhou; Wei Zhang 012; Thambipillai Srikanthan; J. K. J. Teo (CODES+ISSS, 2014)

A Compute-Efficient Algorithm for Robust Eyebrow Detection. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (CVPR Workshops, 2014)

Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits. - Pramod Kumar Meher; Basant K. Mohanty; Thambipillai Srikanthan (ISCAS, 2014)

Mask-based non-maximal suppression with iterative pruning for low-complexity corner detection. - Nirmala Ramakrishnan; Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (ISIC, 2014)

Reducing computational complexity for face detection. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (ISIC, 2014)

Vision-based pedestrian tracking system using color and motion cue. - Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan; Tushar Shah (ISIC, 2014)

Robust real-time route inference from sparse vehicle position data. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2014)

Stereo based ROIs generation for detecting pedestrians in close proximity. - Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (ITSC, 2014)

Algorithmic Aspects for Bi-Objective Multiple-Choice Hardware/Software Partitioning. - Wenjun Shi; Jigang Wu; Siew Kei Lam; Thambipillai Srikanthan (PAAP, 2014)

Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3D-MPSoCs. - Vivek Chaturvedi; Amit Kumar Singh 002; Wei Zhang 012; Thambipillai Srikanthan (RSP, 2014)

IP-Enabled C/C++ Based High Level Synthesis: A Step towards Better Designer Productivity and Design Performance. - Sharad Sinha; Thambipillai Srikanthan (Int. J. Reconfigurable Comput., 2014)

Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis. - Sharad Sinha; Thambipillai Srikanthan (Int. J. Reconfigurable Comput., 2014)

Extended Compatibility Path Based Hardware binding: an Adaptive Algorithm for High Level synthesis of Area-Time Efficient Designs. - Sharad Sinha; Udit Dhawan; Thambipillai Srikanthan (J. Circuits Syst. Comput., 2014)

Constructing Low-temperature sub-Arrays on Reconfigurable VLSI Arrays. - Jigang Wu; Yuanbo Zhu; Zhipeng Niu; Thambipillai Srikanthan (J. Circuits Syst. Comput., 2014)

Addressing Productivity Challenges in Domain-Specific Reconfigurable Platforms: A Case Study on Extended Kalman Filter-Based Motor Control. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (J. Low Power Electron., 2014)

Rapid evaluation of custom instruction selection approaches with FPGA estimation. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (ACM Trans. Embed. Comput. Syst., 2014)

Parallel reconfiguration algorithms for mesh-connected processor arrays. - Jigang Wu; Guiyuan Jiang; Yuze Shen; Siew Kei Lam; Jizhou Sun; Thambipillai Srikanthan (J. Supercomput., 2014)

Dataflow Graph Partitioning for Area-Efficient High-Level Synthesis with Systems Perspective. - Sharad Sinha; Thambipillai Srikanthan (ACM Trans. Design Autom. Electr. Syst., 2014)

Constructing Sub-Arrays with ShortInterconnects from Degradable VLSI Arrays. - Jigang Wu; Thambipillai Srikanthan; Guiyuan Jiang; Kai Wang (IEEE Trans. Parallel Distributed Syst., 2014)

Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration. - Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (ACM Trans. Reconfigurable Technol. Syst., 2014)

Fast Replica Placement and Update Strategies in Tree Networks. - Xu Wang; Jigang Wu; Guiyuan Jiang; Siew Kei Lam; Thambipillai Srikanthan (CCGRID, 2015)

Compute-efficient eye state detection: algorithm, dataset and evaluations. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Thambipillai Srikanthan; Suchitra Sathyanarayana (ICDSC, 2015)

Rapid estimation of DSPs utilization for efficient high-level synthesis. - Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (DSP, 2015)

Leakage-aware intra-task dynamic voltage scaling technique for energy reduction in real-time embedded systems. - Vivek Chaturvedi; Basant K. Mohanty; Thambipillai Srikanthan (DSP, 2015)

Memory-access aware work-load distribution for peak-temperature reduction of 3D multi-core embedded systems. - Basant K. Mohanty; Vivek Chaturvedi; Vijeta Rathore; Thambipillai Srikanthan (DSP, 2015)

Identifying epileptic seizures based on a template-based eyeball detection technique. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (ICIP, 2015)

Critical-path optimization for efficient hardware realization of lifting and flipping DWTs. - Basant K. Mohanty; Pramod Kumar Meher; Thambipillai Srikanthan (ISCAS, 2015)

Probabilistic Map Matching of Sparse and Noisy Smartphone Location Data. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2015)

Adaptive Window Strategy for High-Speed and Robust KLT Feature Tracker. - Nirmala Ramakrishnan; Thambipillai Srikanthan; Siew Kei Lam; Gauri Ravindra Tulsulkar (PSIVT, 2015)

KnapSim - Run-time efficient hardware-software partitioning technique for FPGAs. - Kratika Garg; Yan Lin Aung; Siew Kei Lam; Thambipillai Srikanthan (SoCC, 2015)

Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data. - Pramod Kumar Meher; Basant Kumar Mohanty; Sujit Kumar Patel; Soumya Ganguly; Thambipillai Srikanthan (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Nonparametric Technique Based High-Speed Road Surface Detection. - Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (IEEE Trans. Intell. Transp. Syst., 2015)

Algorithmic aspects of graph reduction for hardware/software partitioning. - Guiyuan Jiang; Jigang Wu; Siew Kei Lam; Thambipillai Srikanthan; Jizhou Sun (J. Supercomput., 2015)

Rapid design space exploration for soft core processor customization and selection. - Deshya Wijesundera; Alok Prakash; Thambipillai Srikanthan (FPT, 2016)

Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems. - Vijeta Rathore; Vivek Chaturvedi; Thambipillai Srikanthan (ACM Great Lakes Symposium on VLSI, 2016)

Reducing Access Latency in Virtual Machine Assignments. - Renfei Gao; Jigang Wu; Guiyuan Jiang; Siew Kei Lam; Thambipillai Srikanthan (HPCC/SmartCity/DSS, 2016)

Modified projected Landweber method for Compressive-Sensing reconstruction of images with non-orthogonal matrices. - Vikramkumar Pudi; Anupam Chattopadhyay; Thambipillai Srikanthan (ISIC, 2016)

FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation. - Anupam Chattopadhyay; Vikramkumar Pudi; Anubhab Baksi; Thambipillai Srikanthan (ISVLSI, 2016)

Heuristic optimizations for high-speed low-latency online map matching with probabilistic sequence models. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2016)

Robust and low complexity obstacle detection and tracking. - Meiqing Wu; Chengju Zhou; Thambipillai Srikanthan (ITSC, 2016)

Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors. - Deshya Wijesundera; Alok Prakash; Siew Kei Lam; Thambipillai Srikanthan (SCOPES, 2016)

Real-time road traffic density estimation using block variance. - Kratika Garg; Siew Kei Lam; Thambipillai Srikanthan; Vedika Agarwal (WACV, 2016)

Algorithms for bi-objective multiple-choice hardware/software partitioning. - Wenjun Shi; Jigang Wu; Siew Kei Lam; Thambipillai Srikanthan (Comput. Electr. Eng., 2016)

Enhanced low-complexity pruning for corner detection. - Nirmala Ramakrishnan; Meiqing Wu; Siew Kei Lam; Thambipillai Srikanthan (J. Real Time Image Process., 2016)

Cost-efficient Acceleration of Hardware Trojan Detection Through Fan-Out Cone Analysis and Weighted Random Pattern Technique. - Bin Zhou; Wei Zhang 012; Thambipillai Srikanthan; Jason Teo Kian Jin; Vivek Chaturvedi; Tao Luo 014 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Low-Complexity Signature-Based Malware Detection for IoT Devices. - Muhamed Fauzi Bin Abbas; Thambipillai Srikanthan (ATIS, 2017)

Low-Complexity Global Motion Estimation for Aerial Vehicles. - Nirmala Ramakrishnan; Alok Prakash; Thambipillai Srikanthan (CVPR Workshops, 2017)

Communication-aware Partitioning for Energy Optimization of Large FPGA Designs. - Kalindu Herath; Alok Prakash; Guiyuan Jiang; Thambipillai Srikanthan (ACM Great Lakes Symposium on VLSI, 2017)

High Speed Performance Estimation of Embedded Hard-core Processors in FPGA-based SoCs. - Deshya Wijesundera; Achintha Ihalage; Alok Prakash; Thambipillai Srikanthan (HEART, 2017)

Fault-Driven Reconfiguration Algorithm for Processor Arrays. - Yalan Wu; Jigang Wu; Yuqing Miu; Thambipillai Srikanthan (ISPA/IUCC, 2017)

Low complexity techniques for robust real-time traffic incident detection. - Kratika Garg; Alok Prakash; Thambipillai Srikanthan (ITSC, 2017)

Online Map-Matching of Noisy and Sparse Location Data With Hidden Markov and Route Choice Models. - George Rosario Jagadeesh; Thambipillai Srikanthan (IEEE Trans. Intell. Transp. Syst., 2017)

A Framework for Fast and Robust Visual Odometry. - Meiqing Wu; Siew-Kei Lam; Thambipillai Srikanthan (IEEE Trans. Intell. Transp. Syst., 2017)

Performance Estimation of FPGA Modules for Modular Design Methodology Using Artificial Neural Network. - Kalindu Herath; Alok Prakash; Thambipillai Srikanthan (ARC, 2018)

LifeSim: A lifetime reliability simulator for manycore systems. - R. Rohith; Vijeta Rathore; Vivek Chaturvedi; Amit Kumar Singh 002; Thambipillai Srikanthan; Siew-Kei Lam (CCWC, 2018)

Side-Channel Assisted Malware Classifier with Gradient Descent Correction for Embedded Platforms. - Manaar Alam; Debdeep Mukhopadhyay; Sai Praveen Kadiyala; Siew Kei Lam; Thambipillai Srikanthan (PROOFS, 2018)

HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems. - Vijeta Rathore; Vivek Chaturvedi; Amit Kumar Singh 002; Thambipillai Srikanthan; R. Rohith; Siew-Kei Lam; Muhammad Shafique 001 (DATE, 2018)

Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices. - Deshya Wijesundera; Alok Prakash; Thilina Perera; Kalindu Herath; Thambipillai Srikanthan (FCCM, 2018)

Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-Software Partitioning in FPGA-based SoCs for IoT Applications. - Deshya Wijesundera; Alok Prakash; Thilina Perera; Kalindu Herath; Thambipillai Srikanthan (HEART, 2018)

A Hybrid Methodology for Optimal Fleet Management in an Electric Vehicle Based Flexible Bus Service. - Thilina Perera; Alok Prakash; Thambipillai Srikanthan (ICARCV, 2018)

Hybrid Genetic Algorithm for an On-Demand First Mile Transit System Using Electric Vehicles. - Thilina Perera; Alok Prakash; Chathura Nagoda Gamage; Thambipillai Srikanthan (ICCS (1), 2018)

Communication-Aware Module Placement for Power Reduction in Large FPGA Designs. - Kalindu Herath; Alok Prakash; Udaree Kanewala; Thambipillai Srikanthan (ISVLSI, 2018)

A Simulation Framework for a Real-Time Demand Responsive Public Transit System. - Thilina Perera; Chathura Nagoda Gamage; Alok Prakash; Thambipillai Srikanthan (ITSC, 2018)

Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs. - Kalindu Herath; Alok Prakash; Guiyuan Jiang; Thambipillai Srikanthan (ReConFig, 2018)

Algorithms for Replica Placement and Update in Tree Network. - Jigang Wu; Long Chen 006; Xu Wang; Guiyuan Jiang; Siew-Kei Lam; Thambipillai Srikanthan (Comput. J., 2018)

Vision-based patient monitoring: a comprehensive review of algorithms and technologies. - Supriya Sathyanarayana; Ravi Kumar Satzoda; Suchitra Sathyanarayana; Thambipillai Srikanthan (J. Ambient Intell. Humaniz. Comput., 2018)

Framework for Rapid Performance Estimation of Embedded Soft Core Processors. - Deshya Wijesundera; Alok Prakash; Thambipillai Srikanthan; Achintha Ihalage (ACM Trans. Reconfigurable Technol. Syst., 2018)

Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design. - Alok Prakash; Christopher T. Clarke; Siew-Kei Lam; Thambipillai Srikanthan (IEEE Trans. Very Large Scale Integr. Syst., 2018)

LifeGuard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Management. - Vijeta Rathore; Vivek Chaturvedi; Amit Kumar Singh 002; Thambipillai Srikanthan; Muhammad Shafique 001 (DAC, 2019)

Genetic Algorithm based EV Scheduling for On-Demand Public Transit System. - Thilina Perera; Alok Prakash; Thambipillai Srikanthan (ICCS (5), 2019)

Dependency-Aware Clustering for Variable-Grained Hardware-Software Partitioning. - Deshya Wijesundera; Nadeeshan Dissanayake; Alok Prakash; Thambipillai Srikanthan; Damith Anhettigama (FPT, 2019)

An Iterative Technique for Runtime Efficient Hardware-Software Partitioning. - Deshya Wijesundera; Kisaru Liyanage; Alok Prakash; Thambipillai Srikanthan; Thilina Perera (FPT, 2019)

Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore Systems. - Vijeta Rathore; Vivek Chaturvedi; Amit Kumar Singh 002; Thambipillai Srikanthan; Muhammad Shafique 001 (IOLTS, 2019)

Genetic Algorithm based Dynamic Scheduling of EV in a Demand Responsive Bus Service for First Mile Transit. - Thilina Perera; Alok Prakash; Thambipillai Srikanthan (ITSC, 2019)

Cluster-First, Route-Second Heuristic for EV Scheduling in On-Demand Public Transit. - Thilina Perera; Alok Prakash; Deshya Wijesundera; Thambipillai Srikanthan; Chathura Nagoda Gamage (CIS/RAM, 2019)

Hardware Efficient NIPALS Architecture for Principal Component Analysis of Hyper Spectral Images. - Sai Praveen Kadiyala; Vikram Kumar Pudi; Mohit Garg; Hau T. Ngo; Siew-Kei Lam; Thambipillai Srikanthan (SoCC, 2019)

Rapid Technique to Eliminate Moving Shadows for Accurate Vehicle Detection. - Kratika Garg; Nirmala Ramakrishnan; Alok Prakash; Thambipillai Srikanthan; Punit Bhatt (WACV, 2019)

Fast Computation of Clustered Many-to-many Shortest Paths and Its Application to Map Matching. - George Rosario Jagadeesh; Thambipillai Srikanthan (ACM Trans. Spatial Algorithms Syst., 2019)

Technique for Vendor and Device Agnostic Hardware Area-Time Estimation. - Deshya Wijesundera; Kushagra Shah; Kisaru Liyanage; Alok Prakash; Thambipillai Srikanthan; Thilina Perera (ARC, 2020)

Evaluating the Merits of Ranking in Structured Network Pruning. - Kuldeep Sharma; Nirmala Ramakrishnan; Alok Prakash; Siew Kei Lam; Thambipillai Srikanthan (ICDCS, 2020)

Accelerating Computer Vision Algorithms on Heterogeneous Edge Computing Platforms. - Alok Prakash; Nirmala Ramakrishnan; Kratika Garg; Thambipillai Srikanthan (SiPS, 2020)

HARDY: Hardware based Analysis for malwaRe Detection in embedded sYstems. - Sai Praveen Kadiyala; Mohit Garg; Manaar Alam; Hau T. Ngo; Debdeep Mukhopadhyay; Thambipillai Srikanthan (SoCC, 2020)

Blockchain-based public auditing for big data in cloud storage. - Jiaxing Li; Jigang Wu; Guiyuan Jiang; Thambipillai Srikanthan (Inf. Process. Manag., 2020)

Improving accuracy of HPC-based malware classification for embedded platforms using gradient descent optimization. - Manaar Alam; Debdeep Mukhopadhyay; Sai Praveen Kadiyala; Siew-Kei Lam; Thambipillai Srikanthan (J. Cryptogr. Eng., 2020)

LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures. - Sai Praveen Kadiyala; Manaar Alam; Yash Shrivastava; Sikhar Patranabis; Muhamed Fauzi Bin Abbas; Arnab Kumar Biswas; Debdeep Mukhopadhyay; Thambipillai Srikanthan (ACM Trans. Embed. Comput. Syst., 2020)

Hardware Performance Counter-Based Fine-Grained Malware Detection. - Sai Praveen Kadiyala; Pranav Jadhav; Siew-Kei Lam; Thambipillai Srikanthan (ACM Trans. Embed. Comput. Syst., 2020)

Rapid and Robust Background Modeling Technique for Low-Cost Road Traffic Surveillance Systems. - Kratika Garg; Nirmala Ramakrishnan; Alok Prakash; Thambipillai Srikanthan (IEEE Trans. Intell. Transp. Syst., 2020)

Incorporating Compiler Optimization in Software Estimation for FPGA-based Embedded Processors. - Deshya Wijesundera; Thilina Perera; Dilina Dehigama; Thambipillai Srikanthan (ICICT, 2021)

Road-network aware Dynamic Workload Balancing Technique for Real-time Route Generation in On-Demand Public Transit. - Thilina Perera; Lahiru Wijerathna; Deshya Wijesundera; Thambipillai Srikanthan (SSCI, 2021)

Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors. - Vijeta Rathore; Vivek Chaturvedi; Amit Kumar Singh 002; Thambipillai Srikanthan; Muhammad Shafique 001 (IEEE Trans. Computers, 2021)

Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs. - Kalindu Herath; Alok Prakash; Suhaib A. Fahmy; Thambipillai Srikanthan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Traffic Speed Prediction of Road Cluster with Heterogeneous Sampling Frequency. - Guiyuan Jiang; Peilan He; Jigang Wu; Yidan Sun; Thambipillai Srikanthan (PAAP, 2022)

Reconfiguration algorithms for synchronous communication on switch based degradable arrays. - Yalan Wu; Jigang Wu; Peng Liu 045; Yinhe Han 001; Thambipillai Srikanthan (Parallel Comput., 2022)

DNN Model Theft Through Trojan Side-Channel on Edge FPGA Accelerator. - Srivatsan Chandrasekar; Siew-Kei Lam; Srikanthan Thambipillai (ARC, 2023)

A Versatile Approach to Polygonal Object Avoidance in Indoor Environments with Hardware Schemes Using an FPGA-Based Multi-Robot. - Mudasar Basha; Munuswamy Siva Kumar; Mangali Chinna Chinnaiah; Siew-Kei Lam; Thambipillai Srikanthan; Narambhatla Janardhan; Dodde Hari Krishna; Sanjay Dubey (Sensors, 2023)

GPSFormer: A Global Perception and Local Structure Fitting-Based Transformer for Point Cloud Understanding. - Changshuo Wang 001; Meiqing Wu; Siew-Kei Lam; Xin Ning 001; Shangshu Yu; Ruiping Wang; Weijun Li 002; Thambipillai Srikanthan (ECCV (8), 2024)

Achieving Real-time Visual Tracking with Low-Cost Edge AI. - Do Van Minh; Meiqing Wu; Siew-Kei Lam; Thambipillai Srikanthan (ICCPS, 2024)

Hierarchical Object-Aware Dual-Level Contrastive Learning for Domain Generalized Stereo Matching. - Yikun Miao; Meiqing Wu; Siew Kei Lam; Changsheng Li; Thambipillai Srikanthan (NeurIPS, 2024)

Hardware Schemes for Smarter Indoor Robotics to Prevent the Backing Crash Framework Using Field Programmable Gate Array-Based Multi-Robots. - Mudasar Basha; Munuswamy Siva Kumar; Mangali Chinna Chinnaiah; Siew-Kei Lam; Thambipillai Srikanthan; Narambhatla Janardhan; Dodde Hari Krishna; Sanjay Dubey (Sensors, 2024)

A Versatile Approach for Adaptive Grid Mapping and Grid Flex-Graph Exploration with a Field-Programmable Gate Array-Based Robot Using Hardware Schemes. - Mudasar Basha; Munuswamy Siva Kumar; Mangali Chinna Chinnaiah; Siew-Kei Lam; Thambipillai Srikanthan; G. Divya Vani; Narambhatla Janardhan; Dodde Hari Krishna; Sanjay Dubey (Sensors, 2024)