Gate Replacement Technique for Reducing Leakage current in Wallace Tree Multiplier. - Naveen Raman 002; Thanushkodi Keppanagounder (J. Comput. Sci., 2013)

Design of Optimal Carry Skip Adder and Carry Skip BCD Adder using Reversible Logic Gates. - Praveena Murugesan; Thanushkodi Keppanagounder (J. Comput. Sci., 2014)

Design of Efficient Reversible BCD Adder-Subtractor Architecture and Its Optimization Using Carry Skip Logic. - Praveena Murugesan; Thanushkodi Keppanagounder; Vijeyakumar Krishnasamy Natarajan (J. Circuits Syst. Comput., 2016)