The semi-automatic generation of processing element control paths for highly parallel machines. - Theodore Sabety; David Elliot Shaw; Brian Mathies (DAC, 1984)

Layout design-lessons from the Jedi designer (tutorial session). - Susan L. Taylor; Roderic Beresford; Theodore Sabety (DAC, 1985)

The multiple-processor PPS chip of the NON-VON 3 supercomputer. - David Elliot Shaw; Theodore Sabety (Integr., 1985)