STT-MRAM Architecture with Parallel Accumulator for In-Memory Binary Neural Networks. - Thi-Nhan Pham; Kien Trinh Quang; Ik-Joon Chang; Massimo Alioto (ISCAS, 2021)

PR-CIM: a Variation-Aware Binary-Neural-Network Framework for Process-Resilient Computation-in-memory. - Minh-Son Le; Thi-Nhan Pham; Thanh-Dat Nguyen; Ik-Joon Chang (CoRR, 2021)

STT-BNN: A Novel STT-MRAM In-Memory Computing Macro for Binary Neural Networks. - Thi-Nhan Pham; Quang-Kien Trinh; Ik-Joon Chang; Massimo Alioto (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks. - Thanh-Dat Nguyen; Minh-Son Le; Thi-Nhan Pham; Ik-Joon Chang (AICAS, 2023)

STT-HDC: An Efficient Time-Domain In-Memory Hyper-Dimensional Computing Design Based on STT-MRAM. - Thi-Nhan Pham; Quang-Kien Trinh; Thanh-Dat Nguyen; Ik-Joon Chang (IEEE Access, 2025)