A PLL for clock generation with automatic frequency control under TID effects. - Ricardo Vanni Dallasen; Gilson Inácio Wirth; Thiago Hanna Both (SBCCI, 2012)

Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. - Fernanda Lima Kastensmidt; Jorge L. Tonfat; Thiago Hanna Both; Paolo Rech; Gilson I. Wirth; Ricardo Reis 001; Florent Bruguier; Pascal Benoit; Lionel Torres; Christopher Frost 002 (ETS, 2014)

The effects of total ionizing dose on the neutron SEU cross section of a 130 nm 4 Mb SRAM memory. - Evaldo Carlos Fonseca Pereira; Odair Lelis Goncalez; Rafael Galhardo Vaz; Claudio Antonio Federico; Thiago Hanna Both; Gilson Inácio Wirth (LATW, 2014)

Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. - Fernanda Lima Kastensmidt; Jorge L. Tonfat; Thiago Hanna Both; Paolo Rech; Gilson I. Wirth; Ricardo Reis 001; Florent Bruguier; Pascal Benoit; Lionel Torres; Christopher Frost 002 (Microelectron. Reliab., 2014)

Design Flow Methodology for Radiation Hardened by Design CMOS Enclosed-Layout-Transistor-Based Standard-Cell Library. - Pablo Ilha Vaz; Thiago Hanna Both; Fábio Fedrizzi Vidor; Raphael Martins Brum; Gilson I. Wirth (J. Electron. Test., 2018)

Modeling and simulation of the charge trapping component of BTI and RTS. - Thiago Hanna Both; Gabriela Firpo Furtado; Gilson Inácio Wirth (Microelectron. Reliab., 2018)

TID effects on I-V characteristics of bulk CMOS STD and ELT-based devices in 600 nm. - Pablo Ilha Vaz; Gilson I. Wirth; Fábio Fedrizzi Vidor; Thiago Hanna Both (Microelectron. J., 2020)