Automation Framework for Large-Scale Regular Expression Matching on FPGA. - Thilan Ganegedara; Yi-Hua E. Yang; Viktor K. Prasanna (FPL, 2010)

FRuG: A benchmark for packet forwarding in future networks. - Thilan Ganegedara; Weirong Jiang; Viktor K. Prasanna (IPCCC, 2010)

Memory-efficient and scalable virtual routers using FPGA. - Hoang Le; Thilan Ganegedara; Viktor K. Prasanna (FPGA, 2011)

Towards On-the-Fly Incremental Updates for Virtualized Routers on FPGA. - Thilan Ganegedara; Hoang Le; Viktor K. Prasanna (FPL, 2011)

Multiroot: Towards Memory-Efficient Router Virtualization. - Thilan Ganegedara; Weirong Jiang; Viktor K. Prasanna (ICC, 2011)

Optimizing packet lookup in time and space on FPGA. - Thilan Ganegedara; Viktor K. Prasanna; Gordon J. Brebner (FPL, 2012)

StrideBV: Single chip 400G+ packet classification. - Thilan Ganegedara; Viktor K. Prasanna (HPSR, 2012)

FPGA-based Router Virtualization: A Power Perspective. - Thilan Ganegedara; Viktor K. Prasanna (IPDPS Workshops, 2012)

Power-efficient and scalable virtual router architecture on FPGA. - Swapnil Haria; Thilan Ganegedara; Viktor K. Prasanna (ReConFig, 2012)

A high-performance IPV6 lookup engine on FPGA. - Thilan Ganegedara; Viktor K. Prasanna (FPL, 2013)

100+ Gbps IPv6 packet forwarding on multi-core platforms. - Thilan Ganegedara; Viktor K. Prasanna (GLOBECOM, 2013)

Wire Speed IPv6 Forwarding on Multi-core Platforms. - Thilan Ganegedara; Viktor K. Prasanna (IPDPS Workshops, 2013)

A Comparison of Ruleset Feature Independent Packet Classification Engines on FPGA. - Andrea Sanny; Thilan Ganegedara; Viktor K. Prasanna (IPDPS Workshops, 2013)

A comprehensive performance analysis of virtual routers on FPGA. - Thilan Ganegedara; Viktor K. Prasanna (ACM Trans. Reconfigurable Technol. Syst., 2013)

A Scalable and Modular Architecture for High-Performance Packet Classification. - Thilan Ganegedara; Weirong Jiang; Viktor K. Prasanna (IEEE Trans. Parallel Distributed Syst., 2014)