On designing optimal camouflaged layouts. - Thomas Broadfoot; Carl Sechen; Jeyavijayan (JV) Rajendran (HOST, 2017)

Quo Vadis Signal? Automated Directionality Extraction for Post-Programming Verification of a Transistor-Level Programmable Fabric. - Apurva Jain; Thomas Broadfoot; Yiorgos Makris; Carl Sechen (DATE, 2023)

Testing a Transistor-Level Programmable Fabric: Challenges and Solutions. - Apurva Jain; Thomas Broadfoot; Carl Sechen; Yiorgos Makris (VTS, 2024)

A TRAP for SAT: On the Imperviousness of a Transistor-Level Programmable Fabric to Satisfiability-Based Attacks. - Aric Fowler; Mohammed Shayan; Mustafa M. Shihab; Thomas Broadfoot; Peter Beerel; Carl Sechen; Yiorgos Makris (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

Modeling Bidirectional Switches for Enabling Logic Equivalence Checking in a Transistor-Level Programmable Fabric. - Apurva Jain; Thomas Broadfoot; Yiorgos Makris; Carl Sechen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)