High Test Quality in Low Pin Count Applications. - Jayant D'Souza; Subramanian Mahadevan; Nilanjan Mukherjee 001; Graham Rhodes; Jocelyn Moreau; Thomas Droniou; Paul Armagnat; Damien Sartoretti (ITC, 2008)

Running scan test on three pins: yes we can! - Jocelyn Moreau; Thomas Droniou; Philippe Lebourg; Paul Armagnat (ITC, 2009)

Horizontal-FPN fault coverage improvement in production test of CMOS imagers. - Richun Fei; Jocelyn Moreau; Salvador Mir; Alexis Marcellin; C. Mandier; E. Huss; G. Palmigiani; P. Vitrou; Thomas Droniou (VTS, 2015)