Thomas Eisenbarth

Orcid: 0000-0003-1116-6973

Affiliations:
  • University of Lübeck, Germany
  • Worcester Polytechnic Institute, MA, USA (former)
  • Florida Atlantic University, FL, USA (former)
  • Ruhr University Bochum, Germany (Ph.D.)


According to our database1, Thomas Eisenbarth authored at least 131 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of three.
  • Erdős number3 of two.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2024
SEV-Step A Single-Stepping Framework for AMD-SEV.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

TeeJam: Sub-Cache-Line Leakages Strike Back.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

SWAT: Modular Dynamic Symbolic Execution for Java Applications using Dynamic Instrumentation (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2024

2023
Subversion-Resilient Authenticated Encryption without Random Oracles.
IACR Cryptol. ePrint Arch., 2023

Combined Fault and Leakage Resilience: Composability, Constructions and Compiler.
IACR Cryptol. ePrint Arch., 2023

Okapi: A Lightweight Architecture for Secure Speculation Exploiting Locality of Memory Accesses.
CoRR, 2023

Microarchitectural Security of AWS Firecracker VMM for Serverless Cloud Platforms.
CoRR, 2023

DASH: Accelerating Distributed Private Machine Learning Inference with Arithmetic Garbled Circuits.
CoRR, 2023

Cipherfix: Mitigating Ciphertext Side-Channel Attacks in Software.
Proceedings of the 32nd USENIX Security Symposium, 2023

SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

"Act natural!": Exchanging Private Messages on Public Blockchains.
Proceedings of the 8th IEEE European Symposium on Security and Privacy, 2023

MAMBO-V: Dynamic Side-Channel Leakage Analysis on RISC-V.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2023

Madvex: Instrumentation-Based Adversarial Attacks on Machine Learning Malware Detection.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2023

Overcoming the Pitfalls of HPC-based Cryptojacking Detection in Presence of GPUs.
Proceedings of the Thirteenth ACM Conference on Data and Application Security and Privacy, 2023

IOTLB-SC: An Accelerator-Independent Leakage Source in Modern Cloud Systems.
Proceedings of the 2023 ACM Asia Conference on Computer and Communications Security, 2023

2022
A Systematic Look at Ciphertext Side Channels on AMD SEV-SNP.
Proceedings of the 43rd IEEE Symposium on Security and Privacy, 2022

Microwalk-CI: Practical Side-Channel Analysis for JavaScript Applications.
Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022

2021
A White-Box Masking Scheme Resisting Computational and Algebraic Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Side-Channel Protections for Picnic Signatures.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Firmware Security Module.
J. Hardw. Syst. Secur., 2021

Help, my Signal has bad Device! Breaking the Signal Messenger's Post-CompromiseSecurity through a Malicious Device.
IACR Cryptol. ePrint Arch., 2021

"Act natural!": Having a Private Chat on a Public Blockchain.
IACR Cryptol. ePrint Arch., 2021

undeSErVed trust: Exploiting Permutation-Agnostic Remote Attestation.
Proceedings of the IEEE Security and Privacy Workshops, 2021

Aim, Wait, Shoot: How the CacheSniper Technique Improves Unprivileged Cache Attacks.
Proceedings of the IEEE European Symposium on Security and Privacy, 2021

Help, My Signal has Bad Device! - Breaking the Signal Messenger's Post-Compromise Security Through a Malicious Device.
Proceedings of the Detection of Intrusions and Malware, and Vulnerability Assessment, 2021


A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Util: : Lookup: Exploiting Key Decoding in Cryptographic Libraries.
Proceedings of the CCS '21: 2021 ACM SIGSAC Conference on Computer and Communications Security, Virtual Event, Republic of Korea, November 15, 2021

2020
JackHammer: Efficient Rowhammer on Heterogeneous FPGA-CPU Platforms.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

SNI-in-the-head: Protecting MPC-in-the-head Protocols against Side-channel Analysis.
IACR Cryptol. ePrint Arch., 2020

Differential Power Analysis of the Picnic Signature Scheme.
IACR Cryptol. ePrint Arch., 2020

ASAP: Algorithm Substitution Attacks on Cryptographic Protocols.
IACR Cryptol. ePrint Arch., 2020

CACHE SNIPER : Accurate timing control of cache evictions.
CoRR, 2020

TPM-FAIL: TPM meets Timing and Lattice Attacks.
Proceedings of the 29th USENIX Security Symposium, 2020

RELOAD+REFRESH: Abusing Cache Replacement Policies to Perform Stealthy Cache Attacks.
Proceedings of the 29th USENIX Security Symposium, 2020

SEVurity: No Security Without Integrity : Breaking Integrity-Free Memory Encryption with Minimal Assumptions.
Proceedings of the 2020 IEEE Symposium on Security and Privacy, 2020

Microarchitectural Isolation Guarantees Through Execution Based Signatures.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

SNI-in-the-head: Protecting MPC-in-the-head Protocols against Side-channel Analysis.
Proceedings of the CCS '20: 2020 ACM SIGSAC Conference on Computer and Communications Security, 2020

2019
MemJam: A False Dependency Attack Against Constant-Time Crypto Implementations.
Int. J. Parallel Program., 2019

FortuneTeller: Predicting Microarchitectural Attacks via Unsupervised Deep Learning.
CoRR, 2019

SPOILER: Speculative Load Hazards Boost Rowhammer and Cache Attacks.
Proceedings of the 28th USENIX Security Symposium, 2019

Undermining User Privacy on Mobile Devices Using AI.
Proceedings of the 2019 ACM Asia Conference on Computer and Communications Security, 2019

2018
Extending Glitch-Free Multiparty Protocols to Resist Fault Injection Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

CacheQuote: Efficiently Recovering Long-term Secrets of SGX EPID via Cache Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Identifying and Eliminating Side-Channel Leaks in Programmable Systems.
IEEE Des. Test, 2018

DeepCloak: Adversarial Crafting As a Defensive Measure to Cloak Processes.
CoRR, 2018

IT Security in Lübeck - The design of a modern and future-proof security curriculum.
Proceedings of the 12th European Workshop on Microelectronics Education, 2018

MemJam: A False Dependency Attack Against Constant-Time Crypto Implementations in SGX.
Proceedings of the Topics in Cryptology - CT-RSA 2018, 2018

MASCAT: Preventing Microarchitectural Attacks Before Distribution.
Proceedings of the Eighth ACM Conference on Data and Application Security and Privacy, 2018

CacheShield: Detecting Cache Attacks through Self-Observation.
Proceedings of the Eighth ACM Conference on Data and Application Security and Privacy, 2018

MicroWalk: A Framework for Finding Side Channels in Binaries.
Proceedings of the 34th Annual Computer Security Applications Conference, 2018

2017
Lightweight Side Channel Resistance: Threshold Implementations of Simon.
IEEE Trans. Computers, 2017

Extending Glitch-Free Multiparty Protocols to Resist Fault Injection Attacks.
IACR Cryptol. ePrint Arch., 2017

CacheZoom: How SGX Amplifies The Power of Cache Attacks.
IACR Cryptol. ePrint Arch., 2017

Cache-Base Application Detection in the Cloud Using Machine Learning.
IACR Cryptol. ePrint Arch., 2017

MemJam: A False Dependency Attack against Constant-Time Crypto Implementations.
CoRR, 2017

CacheShield: Protecting Legacy Processes Against Cache Attacks.
CoRR, 2017

Did we learn from LLC Side Channel Attacks? A Cache Leakage Detection Tool for Crypto Libraries.
CoRR, 2017

AutoLock: Why Cache Attacks on ARM Are Harder Than You Think.
Proceedings of the 26th USENIX Security Symposium, 2017

μLeech: A side-channel evaluation platform for IoT.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

PerfWeb: How to Violate Web Privacy with Hardware Performance Events.
Proceedings of the Computer Security - ESORICS 2017, 2017

Hit by the Bus: QoS Degradation Attack on Android.
Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, 2017

Cache-Based Application Detection in the Cloud Using Machine Learning.
Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, 2017

2016
Cross-VM Cache Attacks on AES.
IEEE Trans. Multi Scale Comput. Syst., 2016

Horizontal and Vertical Side Channel Analysis of a McEliece Cryptosystem.
IEEE Trans. Inf. Forensics Secur., 2016

MASCAT: Stopping Microarchitectural Attacks Before Execution.
IACR Cryptol. ePrint Arch., 2016

Cache Attacks Enable Bulk Key Recovery on the Cloud.
IACR Cryptol. ePrint Arch., 2016

Co-location detection on the Cloud.
IACR Cryptol. ePrint Arch., 2016

A Tale of Two Shares: Why Two-Share Threshold Implementation Seems Worthwhile-and Why it is Not.
IACR Cryptol. ePrint Arch., 2016

A honeypot system for wearable networks.
Proceedings of the 37th IEEE Sarnoff Symposium 2016, Newark, NJ, USA, 2016

Efficient, adversarial neighbor discovery using logical channels on Microsoft Azure.
Proceedings of the 32nd Annual Conference on Computer Security Applications, 2016

2015
Know Thy Neighbor: Crypto Library Detection in Cloud.
Proc. Priv. Enhancing Technol., 2015

On the security margin of MAC striping.
Inf. Process. Lett., 2015

Implementation Attacks on Post-Quantum Cryptographic Schemes.
IACR Cryptol. ePrint Arch., 2015

Silent Simon: A Threshold Implementation under 100 Slices.
IACR Cryptol. ePrint Arch., 2015

Cross Processor Cache Attacks.
IACR Cryptol. ePrint Arch., 2015

Seriously, get off my cloud! Cross-VM RSA Key Recovery in a Public Cloud.
IACR Cryptol. ePrint Arch., 2015

Strength in Numbers: Threshold ECDSA to Protect Keys in the Cloud.
IACR Cryptol. ePrint Arch., 2015

Near Collision Side Channel Attacks.
IACR Cryptol. ePrint Arch., 2015

Simpler, Faster, and More Robust T-test Based Leakage Detection.
IACR Cryptol. ePrint Arch., 2015

SpecTre: A Tiny Side-Channel Resistant Speck Core for FPGAs.
IACR Cryptol. ePrint Arch., 2015

Masking Large Keys in Hardware: A Masked Implementation of McEliece.
IACR Cryptol. ePrint Arch., 2015

Systematic Reverse Engineering of Cache Slice Selection in Intel Processors.
IACR Cryptol. ePrint Arch., 2015

Guest Editorial: Special Section on Embedded System Security.
IEEE Embed. Syst. Lett., 2015

S$A: A Shared Cache Attack That Works across Cores and Defies VM Sandboxing - and Its Application to AES.
Proceedings of the 2015 IEEE Symposium on Security and Privacy, 2015

Power analysis of the t-private logic style for FPGAs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

A Faster and More Realistic Flush+Reload Attack on AES.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2015

Faster Leakage Detection and Exploitation.
Proceedings of the 5th International Workshop on Trustworthy Embedded Devices, 2015

Lucky 13 Strikes Back.
Proceedings of the 10th ACM Symposium on Information, 2015

2014
Toward Practical Homomorphic Evaluation of Block Ciphers Using Prince.
IACR Cryptol. ePrint Arch., 2014

Balanced Encoding to Mitigate Power Analysis: A Case Study.
IACR Cryptol. ePrint Arch., 2014

Differential Power Analysis of a McEliece Cryptosystem.
IACR Cryptol. ePrint Arch., 2014

Wait a minute! A fast, Cross-VM attack on AES.
IACR Cryptol. ePrint Arch., 2014

Fine grain Cross-VM Attacks on Xen and VMware are possible!
IACR Cryptol. ePrint Arch., 2014

Jackpot Stealing Information From Large Caches via Huge Pages.
IACR Cryptol. ePrint Arch., 2014

Non-Linear Collision Analysis.
Proceedings of the Radio Frequency Identification: Security and Privacy Issues, 2014

Bounded, yet Sufficient? How to Determine Whether Limited Side Channel Information Enables Key Recovery.
Proceedings of the Smart Card Research and Advanced Applications, 2014

Fine Grain Cross-VM Attacks on Xen and VMware.
Proceedings of the 2014 IEEE Fourth International Conference on Big Data and Cloud Computing, 2014

2013
Faster Hash-Based Signatures with Bounded Leakage.
Proceedings of the Selected Areas in Cryptography - SAC 2013, 2013

On the Vulnerability of Low Entropy Masking Schemes.
Proceedings of the Smart Card Research and Advanced Applications, 2013

A Performance Boost for Hash-Based Signatures.
Proceedings of the Number Theory and Cryptography, 2013

2012
Masked Dual-Rail Precharge Logic Encounters State-of-the-Art Power Analysis Methods.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices.
IACR Cryptol. ePrint Arch., 2012

Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2012, 2012

Wide Collisions in Practice.
Proceedings of the Applied Cryptography and Network Security, 2012

2011
Keeloq.
Proceedings of the Encyclopedia of Cryptography and Security, 2nd Ed., 2011

Hardware SLE solvers: Efficient building blocks for cryptographic and cryptanalyticapplications.
Integr., 2011

2010
Cryptography and cryptanalysis for embedded systems.
PhD thesis, 2010

Building a Side Channel Based Disassembler.
Trans. Comput. Sci., 2010

Correlation-Enhanced Power Analysis Collision Attack.
IACR Cryptol. ePrint Arch., 2010

Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs.
Proceedings of the Topics in Cryptology, 2010

2009
Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology.
Trans. Comput. Sci., 2009

Vulnerability modeling of cryptographic hardware to power analysis attacks.
Integr., 2009

Power Analysis of Single-Rail Storage Elements as Used in MDPL.
Proceedings of the Information, Security and Cryptology, 2009

KeeLoq and Side-Channel Analysis-Evolution of an Attack.
Proceedings of the Sixth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2009

MicroEliece: McEliece for Embedded Devices.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009

2008
Information Leakage of Flip-Flops in DPA-Resistant Logic Styles.
IACR Cryptol. ePrint Arch., 2008

Physical Cryptanalysis of KeeLoq Code Hopping Applications.
IACR Cryptol. ePrint Arch., 2008

Time-Area Optimized Public-Key Engines: MQ-Cryptosystems as Replacement for Elliptic Curves?
IACR Cryptol. ePrint Arch., 2008

Sicherheit moderner Funktüröffnersysteme.
Datenschutz und Datensicherheit, 2008

Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers.
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoqCode Hopping Scheme.
Proceedings of the Advances in Cryptology, 2008

Time-Area Optimized Public-Key Engines: -Cryptosystems as Replacement for Elliptic Curves?.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

Fast Hash-Based Signatures on Constrained Devices.
Proceedings of the Smart Card Research and Advanced Applications, 2008

2007
A Survey of Lightweight-Cryptography Implementations.
IEEE Des. Test Comput., 2007

A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Establishing Chain of Trust in Reconfigurable Hardware.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2007

Reconfigurable trusted computing in hardware.
Proceedings of the 2nd ACM Workshop on Scalable Trusted Computing, 2007


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