High-level synthesis in a rapid-prototype environment for mechatronic systems. - Norbert Wehn; Hans-Jürgen Herpel; Thomas Hollstein; Peter Poechmueller; Manfred Glesner (EURO-DAC, 1992)

Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays. - Thomas Hollstein; Saman K. Halgamuge; Andreas Kirschbaum; Manfred Glesner (Fuzzy Days, 1994)

Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. - U. Zahm; Thomas Hollstein; Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner (FPL, 1995)

Computer-aided design of fuzzy systems based on generic VHDL specifications. - Thomas Hollstein; Saman K. Halgamuge; Manfred Glesner (IEEE Trans. Fuzzy Syst., 1996)

A prototyping environment for fuzzy controllers. - Thomas Hollstein; Andreas Kirschbaum; Manfred Glesner (FPL, 1997)

HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. - Thomas Hollstein; Jürgen Becker 001; Andreas Kirschbaum; Manfred Glesner (CODES, 1998)

From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms. - Claus Schneider; Martin Kayss; Thomas Hollstein; Jürgen Deicke (DATE, 1998)

Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems. - Matthias Meixner; Jürgen Becker 001; Thomas Hollstein; Manfred Glesner (MBMV, 1999)

Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design. - Jochen Mades; Thomas Schneider 006; André Windisch; Thomas Hollstein; Jürgen Becker 001; Manfred Glesner (MSE, 2001)

Integrated Design and Test Generation Under Internet Based Environment MOSCITO. - André Schneider; Karl-Heinz Diener; Eero Ivask; Raimund Ubar; Elena Gramatová; Thomas Hollstein; Wieslaw Kuzmicz; Zebo Peng (DSD, 2002)

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. - Tudor Murgan; Mihail Petrov; Alberto García Ortiz; Ralf Ludewig; Peter Zipf; Thomas Hollstein; Manfred Glesner; Bernard Ölkrug; Jörg Brakensiek (FPL, 2003)

A hierarchical generic approach for on-chip communication, testing and debugging of SoCs. - Thomas Hollstein; Ralf Ludewig; Christoph Mager; Peter Zipf; Manfred Glesner (VLSI-SOC, 2003)

Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs. - Thomas Hollstein; Ralf Ludewig; Heiko Zimmer; Christoph Mager; Simon Hohenstern; Manfred Glesner (VLSI-SoC (Selected Papers), 2003)

Reconfigurable platforms for ubiquitous computing. - Manfred Glesner; Thomas Hollstein; Leandro Soares Indrusiak; Peter Zipf; Thilo Pionteck; Mihail Petrov; Heiko Zimmer; Tudor Murgan (Conf. Computing Frontiers, 2004)

An Asynchronous Switch Implmentation for Systems-on-a-Chip. - Peter Zipf; Heiko Hinkelmann; Adeel Ashraf; Thomas Hollstein; Manfred Glesner (MBMV, 2004)

Rapid Prototyping of an Integrated Testing and Debugging Unit. - Ralf Ludewig; Thomas Hollstein; Falko Schütz; Manfred Glesner (IEEE International Workshop on Rapid System Prototyping, 2004)

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip. - Martin K. F. Schafer; Thomas Hollstein; Heiko Zimmer; Manfred Glesner (ICCAD, 2005)

Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip. - Heiko Zimmer; Stefan Zink; Thomas Hollstein; Manfred Glesner (IPDPS, 2005)

Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip. - Thomas Hollstein; Sujan Pandey; Manfred Glesner (ReCoSoC, 2005)

Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. - Manfred Glesner; Heiko Hinkelmann; Thomas Hollstein; Leandro Soares Indrusiak; Tudor Murgan; Abdulfattah Mohammad Obeid; Mihail Petrov; Thilo Pionteck; Peter Zipf (SAMOS, 2005)

Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. - Thomas Hollstein; Manfred Glesner (Comput. Electr. Eng., 2007)

Multicast Parallel Pipeline Router Architecture for Network-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (DATE, 2008)

Flexible parallel pipeline network-on-chip based on dynamic packet identity management. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IPDPS, 2008)

Hardware Based Rapid Prototyping. - Manfred Glesner; Tudor Murgan; Thomas Hollstein (Wiley Encyclopedia of Computer Science and Engineering, 2008)

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (VLSI Design, 2009)

Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Very Large Scale Integr. Syst., 2010)

A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. - Haoyuan Ying; Ashok Jaiswal; Thomas Hollstein; Klaus Hofmann (DSD, 2011)

Contention aware scheduling for NoC-based real-time systems. - Mihkel Tagel; Peeter Ellervee; Thomas Hollstein; Gert Jervan (NORCHIP, 2011)

Invited paper: Design criteria for dependable System-on-Chip architectures. - Thomas Hollstein; Faizal Arya Samman; Ashok Jaiswal; Haoyuan Ying; Manfred Glesner; Klaus Hofmann (ReCoSoC, 2011)

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2011)

New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Parallel Distributed Syst., 2011)

A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. - Haoyuan Ying; Ashok Jaiswal; Mohamed A. Abd El-Ghany; Thomas Hollstein; Klaus Hofmann (DDECS, 2012)

A genetic algorithm based optimization method for low vertical link density 3-dimensional Networks-on-Chip many core systems. - Haoyuan Ying; Kris Heid; Thomas Hollstein; Klaus Hofmann (NORCHIP, 2012)

Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints. - Mohsin Amin; Mihkel Tagel; Gert Jervan; Thomas Hollstein (ReCoSoC, 2012)

Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (ReCoSoC, 2012)

Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2012)

Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (Microprocess. Microsystems, 2012)

Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (DATE, 2013)

GSNoC - The comprehensive design platform for 3-dimensional Networks-on-Chip based many core embedded systems. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (HPCS, 2013)

Deadlock-free generic routing algorithms for 3-dimensional Networks-on-Chip with reduced vertical link density topologies. - Haoyuan Ying; Ashok Jaiswal; Thomas Hollstein; Klaus Hofmann (J. Syst. Archit., 2013)

Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip. - Faizal Arya Samman; Thomas Hollstein; Manfred Glesner (IEEE Trans. Parallel Distributed Syst., 2013)

A modular 6LoWPAN-based wireless sensor body area network for health-monitoring applications. - Yannick Le Moullec; Yoann Lecat; Paul Annus; Raul Land; Alar Kuusik; Marko Reidla; Thomas Hollstein; Uljana Reinsalu; Kalle Tammemäe; Priit Ruberg (APSIPA, 2014)

Motivation-driven learning processes at the example of embedded systems. - Thomas Hollstein; Uljana Reinsalu; Mairo Leier (EWME, 2014)

Dynamic quadrant partitioning adaptive routing algorithm for irregular reduced vertical link density topology 3-Dimensional Network-on-Chips. - Haoyuan Ying; Klaus Hofmann; Thomas Hollstein (HPCS, 2014)

A hardware/software co-design reconfigurable Network-on-Chip FPGA emulation method. - Haoyuan Ying; Thomas Hollstein; Klaus Hofmann (ReCoSoC, 2014)

NoCDepend: A Flexible and Scalable Dependability Technique for 3D Networks-on-Chip. - Thomas Hollstein; Siavoosh Payandeh Azad; Thilo Kogge; Haoyuan Ying; Klaus Hofmann (DDECS, 2015)

A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers. - Pietro Saltarelli; Behrad Niazmand; Jaan Raik; Ranganathan Hariharan; Gert Jervan; Thomas Hollstein (DSD, 2015)

A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers. - Pietro Saltarelli; Behrad Niazmand; Jaan Raik; Vineeth Govind; Thomas Hollstein; Gert Jervan; Ranganathan Hariharan (NOCS, 2015)

Mixed-criticality NoC partitioning based on the NoCDepend dependability technique. - Thomas Hollstein; Siavoosh Payandeh Azad; Thilo Kogge; Behrad Niazmand (ReCoSoC, 2015)

Automated minimization of concurrent online checkers for Network-on-Chips. - Pietro Saltarelli; Behrad Niazmand; Ranganathan Hariharan; Jaan Raik; Gert Jervan; Thomas Hollstein (ReCoSoC, 2015)

Practicing start-up culture in teaching embedded systems. - Uljana Reinsalu; Siavoosh Payandeh Azad; Mairo Leier; Kalle Tammemäe; Thomas Hollstein (EWME, 2016)

Logic-based implementation of fault-tolerant routing in 3D network-on-chips. - Behrad Niazmand; Siavoosh Payandeh Azad; José Flich; Jaan Raik; Gert Jervan; Thomas Hollstein (NOCS, 2016)

SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints. - Siavoosh Payandeh Azad; Behrad Niazmand; Peeter Ellervee; Jaan Raik; Gert Jervan; Thomas Hollstein (ReCoSoC, 2016)

Foreword. - Jaan Raik; Ian O'Connor; Thomas Hollstein; Krishnendu Chakrabarty (VLSI-SoC, 2016)

Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems. - Siavoosh Payandeh Azad; Behrad Niazmand; Jaan Raik; Gert Jervan; Thomas Hollstein (CoRR, 2016)

From online fault detection to fault management in Network-on-Chips: A ground-up approach. - Siavoosh Payandeh Azad; Behrad Niazmand; Karl Janson; Nevin George; Stephen Adeboye Oyeniran; Tsotne Putkaradze; Apneet Kaur; Jaan Raik; Gert Jervan; Raimund Ubar; Thomas Hollstein (DDECS, 2017)

Automated area and coverage optimization of minimal latency checkers. - Siavoosh Payandeh Azad; Behrad Niazmand; Apneet Kaur Sandhu; Jaan Raik; Gert Jervan; Thomas Hollstein (ETS, 2017)

Comprehensive performance and robustness analysis of 2D turn models for network-on-chips. - Siavoosh Payandeh Azad; Behrad Niazmand; Karl Janson; Thilo Kogge; Jaan Raik; Gert Jervan; Thomas Hollstein (ISCAS, 2017)

Software-Level TMR Approach for On-Board Data Processing in Space Applications. - Karl Janson; Carl Johann Treudler; Thomas Hollstein; Jaan Raik; Maksim Jenihhin; Görschwin Fey (DDECS, 2018)

A Distributed DoS Detection Scheme for NoC-based MPSoCs. - Cesar G. Chaves; Siavoosh Payandeh Azad; Thomas Hollstein; Johanna Sepúlveda (NORCAS, 2018)

Detecting and Mitigating Low-and-Slow DoS Attacks in NoC-based MPSoCs. - Cesar G. Chaves; Siavoosh Payandeh Azad; Johanna Sepúlveda; Thomas Hollstein (ReCoSoC, 2019)

An Efficient FPGA-based Architecture for Contractive Autoencoders. - Madis Kerner; Kalle Tammemäe; Jaan Raik; Thomas Hollstein (FCCM, 2020)

Triple Fixed-Point MAC Unit for Deep Learning. - Madis Kerner; Kalle Tammemäe; Jaan Raik; Thomas Hollstein (DATE, 2021)

Lightweight Monitoring Scheme for Flooding DoS Attack Detection in Multi-Tenant MPSoCs. - Cesar G. Chaves; Johanna Sepúlveda; Thomas Hollstein (ISCAS, 2021)

An Efficient Feature-based Method for People Counting. - Daniel Helmer; Heiko Hinkelmann; Thomas Hollstein (SAC, 2023)

Open-Source Based Automated Interrupt-Driven Testing Methodology for Embedded Systems Labs for Undergraduate Students. - Anton Jastsuk; Uljana Reinsalu; Thomas Hollstein (MECO, 2025)