The VampirTrace Plugin Counter Interface: Introduction and Examples. - Robert Schöne; Ronny Tschüter; Thomas Ilsche; Daniel Hackenberg (Euro-Par Workshops, 2010)

Non-intrusive Performance Analysis of Parallel Hardware Accelerated Applications on Hybrid Architectures. - Robert Dietrich; Thomas Ilsche; Guido Juckeland (ICPP Workshops, 2010)

Enabling event tracing at leadership-class scale through I/O forwarding middleware. - Thomas Ilsche; Joseph Schuchart; Jason Cope; Dries Kimpe; Terry R. Jones; Andreas Knüpfer; Kamil Iskra; Robert B. Ross; Wolfgang E. Nagel; Stephen Poole 001 (HPDC, 2012)

HERCULES: A Pattern Driven Code Transformation System. - Christos Kartsaklis; Oscar R. Hernandez; Chung-Hsing Hsu; Thomas Ilsche; Wayne Joubert; Richard L. Graham (IPDPS Workshops, 2012)

Power measurement techniques on standard compute nodes: A quantitative comparison. - Daniel Hackenberg; Thomas Ilsche; Robert Schöne; Daniel Molka; Maik Schmidt; Wolfgang E. Nagel (ISPASS, 2013)

Dynamic fine-grained scheduling for energy-efficient main-memory queries. - Iraklis Psaroudakis; Thomas Kissinger; Danica Porobic; Thomas Ilsche; Erietta Liarou; Pinar Tözün; Anastasia Ailamaki; Wolfgang Lehner (DaMoN, 2014)

Analysis of Parallel Applications on a High Performance-Low Energy Computer. - Florina M. Ciorba; Thomas Ilsche; Elke Franz 001; Stefan Pfennig; Christian Scheunert; Ulf Markwardt; Joseph Schuchart; Daniel Hackenberg; Robert Schöne; Andreas Knüpfer; Wolfgang E. Nagel; Eduard A. Jorswieck; et al. (Euro-Par Workshops (2), 2014)

Modeling communication delays for network coding and routing for error-prone transmission. - Stefan Pfennig; Elke Franz 001; Florina M. Ciorba; Thomas Ilsche; Wolfgang E. Nagel (FGCT, 2014)

Towards Parallel Performance Analysis Tools for the OpenSHMEM Standard. - Sebastian Oeste; Andreas Knüpfer; Thomas Ilsche (OpenSHMEM, 2014)

Energy-Efficient Data Processing at Sweet Spot Frequencies. - Sebastian Götz; Thomas Ilsche; Jorge Cardoso 001; Josef Spillner; Uwe Aßmann; Wolfgang E. Nagel; Alexander Schill (OTM Workshops, 2014)

HDEEM: high definition energy efficiency monitoring. - Daniel Hackenberg; Thomas Ilsche; Joseph Schuchart; Robert Schöne; Wolfgang E. Nagel; Marc Simon; Yiannis Georgiou (E2SC@SC, 2014)

Energy-Efficient Databases Using Sweet Spot Frequencies. - Sebastian Götz; Thomas Ilsche; Jorge Cardoso 001; Josef Spillner; Thomas Kissinger; Uwe Aßmann; Wolfgang Lehner; Wolfgang E. Nagel; Alexander Schill (UCC, 2014)

Optimizing I/O forwarding techniques for extreme-scale event tracing. - Thomas Ilsche; Joseph Schuchart; Jason Cope; Dries Kimpe; Terry R. Jones; Andreas Knüpfer; Kamil Iskra; Robert B. Ross; Wolfgang E. Nagel; Stephen Poole 001 (Clust. Comput., 2014)

Power measurements for compute nodes: Improving sampling rates, granularity and accuracy. - Thomas Ilsche; Daniel Hackenberg; Stefan Graul; Robert Schöne; Joseph Schuchart (IGSC, 2015)

An Energy Efficiency Feature Survey of the Intel Haswell Processor. - Daniel Hackenberg; Robert Schöne; Thomas Ilsche; Daniel Molka; Joseph Schuchart; Robin Geyer 001 (IPDPS Workshops, 2015)

HAEC-SIM: a simulation framework for highly adaptive energy-efficient computing platforms. - Mario Bielert; Florina M. Ciorba; Kim Feldhoff; Thomas Ilsche; Wolfgang E. Nagel (SimuTools, 2015)

Software Controlled Clock Modulation for Energy Efficiency Optimization on Intel Processors. - Robert Schöne; Thomas Ilsche; Mario Bielert; Daniel Molka; Daniel Hackenberg (E2SC@SC, 2016)

Simulation models verification for resilient communication on a highly adaptive energy-efficient computer. - Stefan Pfennig; Kim Feldhoff; Florina M. Ciorba; Elke Franz 001; Tobias Reiher; Mario Bielert; Thomas Ilsche; Wolfgang E. Nagel (SpringSim (HPS), 2016)

The shift from processor power consumption to performance variations: fundamental implications at scale. - Joseph Schuchart; Daniel Hackenberg; Robert Schöne; Thomas Ilsche; Ramkumar Nagappan; Michael K. Patterson (Comput. Sci. Res. Dev., 2016)

lo2s - Multi-core System and Application Performance Analysis for Linux. - Thomas Ilsche; Robert Schöne; Mario Bielert; Andreas Gocht; Daniel Hackenberg (CLUSTER, 2017)

Powernightmares: The Challenge of Efficiently Using Sleep States on Multi-core Systems. - Thomas Ilsche; Marcus Hähnel; Robert Schöne; Mario Bielert; Daniel Hackenberg (Euro-Par Workshops, 2017)

Design Evaluation of a Performance Analysis Trace Repository. - Richard Grunzke; Maximilian Neumann; Thomas Ilsche; Volker Hartmann; Thomas Jejkal; Rainer Stotzka; Andreas Knüpfer; Wolfgang E. Nagel (ICCS, 2017)

Secure and energy-efficient interconnects for board-to-board communication. - Bho Matthiesen; Stefan Pfennig; Mario Bielert; Thomas Ilsche; Andrew Lonnstrom; Tao Li 026; Juan A. Cabrera 002; Christian Scheunert; Elke Franz 001; Silvia Santini; Thorsten Strufe; Eduard A. Jorswieck; et al. (ICUWB, 2017)

A Statistical Approach to Power Estimation for x86 Processors. - Mohak Chadha; Thomas Ilsche; Mario Bielert; Wolfgang E. Nagel (IPDPS Workshops, 2017)

Generic Library Interception for Improved Performance Measurement and Insight. - Ronny Brendel; Bert Wesarg; Ronny Tschüter; Matthias Weber 002; Thomas Ilsche; Sebastian Oeste (ESPT/VPA@SC, 2017)

E-Team: Practical Energy Accounting for Multi-Core Systems. - Till Smejkal; Marcus Hähnel; Thomas Ilsche; Michael Roitzsch; Wolfgang E. Nagel; Hermann Härtig (USENIX ATC, 2017)

System Monitoring with lo2s: Power and Runtime Impact of C-State Transitions. - Thomas Ilsche; Robert Schöne; Philipp Joram; Mario Bielert; Andreas Gocht (IPDPS Workshops, 2018)

Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance. - Robert Schöne; Thomas Ilsche; Mario Bielert; Andreas Gocht; Daniel Hackenberg (HPCS, 2019)

MetricQ: A Scalable Infrastructure for Processing High-Resolution Time Series Data. - Thomas Ilsche; Daniel Hackenberg; Robert Schöne; Mario Höpfner; Wolfgang E. Nagel (DAAC@SC, 2019)

Power measurement techniques for energy-efficient computing: reconciling scalability, resolution, and accuracy. - Thomas Ilsche; Robert Schöne; Joseph Schuchart; Daniel Hackenberg; Marc Simon; Yiannis Georgiou; Wolfgang E. Nagel (SICS Softw.-Intensive Cyber Phys. Syst., 2019)

Energy Measurements of High Performance Computing Systems: From Instrumentation to Analysis. - Thomas Ilsche (2020)

Energy Efficiency Aspects of the AMD Zen 2 Architecture. - Robert Schöne; Thomas Ilsche; Mario Bielert; Markus Velten; Markus Schmidl; Daniel Hackenberg (CLUSTER, 2021)

Investigating the Cause and Effect of an AMD Zen Energy Management Anomaly. - Christian von Elm; Thomas Ilsche; Robert Schöne; Mario Bielert; Markus Schmidl (ICPE (Companion), 2021)

Bridging the Gap between Application Performance Analysis and System Monitoring. - Thomas Ilsche; Mario Bielert; Christian von Elm (CLUSTER, 2022)

Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors. - Markus Velten; Robert Schöne; Thomas Ilsche; Daniel Hackenberg (ICPE, 2022)

Autonomy Loops for Monitoring, Operational Data Analytics, Feedback, and Response in HPC Operations. - Francieli Boito; Jim M. Brandt; Valeria Cardellini; Philip H. Carns; Florina M. Ciorba; Hilary Egan; Ahmed Eleliemy; Ann C. Gentile; Thomas Gruber; Jeff Hanson; Utz-Uwe Haus; Kevin A. Huck; et al. (CLUSTER Workshops, 2023)

How Do OS and Application Schedulers Interact? An Investigation with Multithreaded Applications. - Jonas H. Müller Korndörfer; Ahmed Eleliemy; Osman Seckin Simsek; Thomas Ilsche; Robert Schöne; Florina M. Ciorba (Euro-Par, 2023)

Evaluating the Energy Measurements of the IBM POWER9 On-Chip Controller. - Hannes Tröpgen; Mario Bielert; Thomas Ilsche (ICPE, 2023)

Optimizing Idle Power of HPC Systems: Practical Insights and Methods. - Thomas Ilsche; Sebastian Schräder; Robert Schöne (CLUSTER Workshops, 2024)

16 Years of SPEC Power: An Analysis of x86 Energy Efficiency Trends. - Hannes Tröpgen; Robert Schöne; Thomas Ilsche; Daniel Hackenberg (CLUSTER Workshops, 2024)

An Experimental Setup to Evaluate RAPL Energy Counters for Heterogeneous Memory. - Lukas Alt; Anara Kozhokanova; Thomas Ilsche; Christian Terboven; Matthias S. Müller (ICPE, 2024)

Energy Efficiency Features of the Intel Alder Lake Architecture. - Robert Schöne; Markus Velten; Daniel Hackenberg; Thomas Ilsche (ICPE, 2024)

Energy-aware operation of HPC systems in Germany. - Estela Suarez; Hendryk Bockelmann; Norbert Eicker; Jan Eitzinger; Salem El Sayed; Thomas Fieseler; Martin Frank; Peter Frech; Pay Giesselmann; Daniel Hackenberg; Georg Hager; Andreas Herten; et al. (CoRR, 2024)

Calibrating DRAMPower Model: A Runtime Perspective from Real-System HPC Measurements. - Xinyu Shi; Dina Ali Abdelhamid; Thomas Ilsche; Saeideh Alinezhad Chamazcoti; Timon Evenblij; Mohit Gupta 004; Dwaipayan Biswas; Francky Catthoor (CoRR, 2024)