A Flexible Implementation of a Temporal Filter with Motion Compensation. - Thomas Perschke (FPL, 2006)

Circuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications. - Lars Braun; Michael Hübner 001; Jürgen Becker 001; Thomas Perschke; Volker Schatz; Stefan Bach (FPL, 2007)

New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. - Diana Göhringer; Michael Hübner 001; Thomas Perschke; Jürgen Becker 001 (FPL, 2008)

A Taxonomy of Reconfigurable Single-/Multiprocessor Systems-on-Chip. - Diana Göhringer; Thomas Perschke; Michael Hübner 001; Jürgen Becker 001 (Int. J. Reconfigurable Comput., 2009)

Adaptive real-time image processing exploiting two dimensional reconfigurable architecture. - Lars Braun; Diana Göhringer; Thomas Perschke; Volker Schatz; Michael Hübner 001; Jürgen Becker 001 (J. Real Time Image Process., 2009)

A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker. - Matthias Rümmele-Werner; Thomas Perschke; Lars Braun; Michael Hübner 001; Jürgen Becker 001 (ISCAS, 2011)

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. - Timo Stripf; Oliver Oey; Thomas Bruckschlögl; Ralf König 001; Michael Hübner 001; Jürgen Becker 001; Gerard K. Rauwerda; Kim Sunesen; Nikolaos Kavvadias; Grigoris Dimitroulakos; Kostas Masselos; Dimitrios Kritharidis; et al. (ReCoSoC, 2012)

Compiling Scilab to high performance embedded multicore systems. - Timo Stripf; Oliver Oey; Thomas Bruckschlögl; Jürgen Becker 001; Gerard K. Rauwerda; Kim Sunesen; George Goulas; Panayiotis Alefragis; Nikolaos S. Voros; Steven Derrien; Olivier Sentieys; Nikolaos Kavvadias; et al. (Microprocess. Microsystems, 2013)

Accelerating local feature extraction using OpenCL on heterogeneous platforms. - Konrad Moren; Thomas Perschke; Diana Göhringer (DASIP, 2014)