High-Frequency, At-Speed Scan Testing. - Xijiang Lin; Ron Press; Janusz Rajski; Paul Reuter; Thomas Rinderknecht; Bruce Swanson; Nagesh Tamarapalli (IEEE Des. Test Comput., 2003)

Logic BIST with Scan Chain Segmentation. - Liyang Lai; Janak H. Patel; Thomas Rinderknecht; Wu-Tung Cheng (ITC, 2004)

Embedded Test for Low Cost Manufacturing. - Janusz Rajski; Nilanjan Mukherjee 001; Jerzy Tyszer; Thomas Rinderknecht (VLSI Design, 2004)

Logic BIST Using Constrained Scan Cells. - Liyang Lai; Thomas Rinderknecht; Wu-Tung Cheng; Janak H. Patel (VTS, 2004)

Hardware Ef.cient LBISTWith Complementary Weights. - Liyang Lai; Janak H. Patel; Thomas Rinderknecht; Wu-Tung Cheng (ICCD, 2005)

Signature Based Diagnosis for Logic BIST. - Wu-Tung Cheng; Manish Sharma; Thomas Rinderknecht; Liyang Lai; Chris Hill (ITC, 2006)

Programmable Scan-Based Logic Built-In Self Test. - Liyang Lai; Wu-Tung Cheng; Thomas Rinderknecht (ATS, 2007)

ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction. - Santiago Remersaro; Janusz Rajski; Thomas Rinderknecht; Sudhakar M. Reddy; Irith Pomeranz (DFT, 2008)

On the Generation of Compact Deterministic Test Sets for BIST Ready Designs. - Amit Kumar 004; Janusz Rajski; Sudhakar M. Reddy; Thomas Rinderknecht (Asian Test Symposium, 2013)