Object-oriented modeling and synthesis of SystemC specifications. - C. Schulz-Key; Markus Winterholer; Thomas Schweizer; Tommy Kuhn; Wolfgang Rosenstiel (ASP-DAC, 2004)

A Design Environment for Processor-Like Reconfigurable Hardware. - Tobias Oppold; Thomas Schweizer; Tommy Kuhn; Wolfgang Rosenstiel (PARELEC, 2004)

Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures. - Tobias Oppold; Thomas Schweizer; Tommy Kuhn; Wolfgang Rosenstiel; Urs Kanus; Wolfgang Straßer (FPL, 2005)

Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain. - Julio A. de Oliveira Filho; Thomas Schweizer; Tobias Oppold; Tommy Kuhn; Wolfgang Rosenstiel (ReConFig, 2006)

Exploiting Slack Time in Dynamically Reconfigurable Processor Architectures. - Thomas Schweizer; Tobias Oppold; Julio A. de Oliveira Filho; Sven Eisenhardt; Kai Blocher; Wolfgang Rosenstiel (FPT, 2007)

CRC - Concepts and Evaluation of Processor-Like Reconfigurable Architectures (CRC - Konzepte und Bewertung prozessorartig rekonfigurierbarer Architekturen). - Tobias Oppold; Thomas Schweizer; Julio A. de Oliveira Filho; Sven Eisenhardt; Wolfgang Rosenstiel (it Inf. Technol., 2007)

Coarse-grained reconfiguration. - Sven Eisenhardt; Thomas Schweizer; Julio A. de Oliveira Filho; Tobias Oppold; Wolfgang Rosenstiel; Alexander Thomas; Jürgen Becker 001; Frank Hannig; Dmitrij Kissler; Hritam Dutta; Jürgen Teich; Heiko Hinkelmann; et al. (FPL, 2008)

Optimizing Partial Reconfiguration of Multi-context Architectures. - Sven Eisenhardt; Tobias Oppold; Thomas Schweizer; Wolfgang Rosenstiel (ReConFig, 2008)

Low Energy Voltage Dithering in Dual VDD Circuits. - Thomas Schweizer; Julio A. de Oliveira Filho; Tommy Kuhn; Wolfgang Rosenstiel (PATMOS, 2009)

Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures. - Sven Eisenhardt; Thomas Schweizer; Andreas Bernauer; Tommy Kuhn; Wolfgang Rosenstiel (ReConFig, 2009)

CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable Arrays. - Julio A. de Oliveira Filho; Stephan Masekowsky; Thomas Schweizer; Wolfgang Rosenstiel (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Evaluation and Design Methods for Processor-Like Reconfigurable Architectures. - Sven Eisenhardt; Thomas Schweizer; Julio A. de Oliveira Filho; Tommy Kuhn; Wolfgang Rosenstiel (Dynamically Reconfigurable Systems, 2010)

Charge Recycling in Voltage-Dithered Circuits. - Thomas Schweizer; Julio A. de Oliveira Filho; Tommy Kuhn; Wolfgang Rosenstiel (J. Low Power Electron., 2010)

Verfahren und Schaltkreis zur Ladungswiederverwendung in Schaltungen mit mehrfacher und abschaltbarer Spannungsversorgung. - Thomas Schweizer (2010)

Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures. - Sven Eisenhardt; Anja Küster; Thomas Schweizer; Tommy Kuhn; Wolfgang Rosenstiel (DFT, 2011)

Low-Cost TMR for Fault-Tolerance on Coarse-Grained Reconfigurable Architectures. - Thomas Schweizer; Philipp Schlicker; Sven Eisenhardt; Tommy Kuhn; Wolfgang Rosenstiel (ReConFig, 2011)

Runtime-datapath-remapping for fault-tolerant coarse-grained reconfigurable architectures. - Sven Eisenhardt; Anja Küster; Thomas Schweizer; Tommy Kuhn; Wolfgang Rosenstiel (ReCoSoC, 2011)

Using Run-Time Reconfiguration to Implement Fault-Tolerant Coarse Grained Reconfigurable Architectures. - Thomas Schweizer; Anja Küster; Sven Eisenhardt; Tommy Kuhn; Wolfgang Rosenstiel (IPDPS Workshops, 2012)

A Fast and Accurate FPGA-Based Fault Injection System. - Thomas Schweizer; Dustin Peterson; Johannes Maximilian Kühn; Tommy Kuhn; Wolfgang Rosenstiel (FCCM, 2013)

Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection. - Johannes Maximilian Kühn; Thomas Schweizer; Dustin Peterson; Tommy Kuhn; Wolfgang Rosenstiel (FPT, 2013)

StML: Bridging the gap between FPGA design and HDL circuit description. - Dustin Peterson; Oliver Bringmann 001; Thomas Schweizer; Wolfgang Rosenstiel (FPT, 2013)

Timing error handling on CGRAs. - Thomas Schweizer; Wolfgang Rosenstiel; Luigi Vaz Ferreira; Marcus Ritt (ReConFig, 2013)

Rotated parallel mapping: A novel approach for mapping data parallel applications on CGRAs. - Simon Schulz; Oliver Bringmann 001; Thomas Schweizer; Wolfgang Rosenstiel (ReConFig, 2014)

Adaptive multi-layer techniques for increased system dependability. - Lars Bauer; Jörg Henkel; Andreas Herkersdorf; Michael A. Kochte; Johannes Maximilian Kühn; Wolfgang Rosenstiel; Thomas Schweizer; Stefan Wallentowitz; Volker Wenzel; Thomas Wild; Hans-Joachim Wunderlich; Hongyan Zhang 004 (it Inf. Technol., 2015)

Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs. - Konstantin Lübeck; David Morgenstern; Thomas Schweizer; Dustin Peterson; Wolfgang Rosenstiel; Oliver Bringmann 001 (MBMV, 2016)

Eine Tcl-basierte Methode zur Fehlerinjektion und Fehlereffektsimulation/-emulation auf Xilinx-FPGAs. - Thomas Schweizer; Murat Simsek; Oliver Bringmann 001; Wolfgang Rosenstiel (MBMV, 2016)

Can Refactorings Indicate Design Tradeoffs? - Thomas Schweizer; Vassilis Zafeiris; Marios Fokaefs; Michalis Famelis (SCAM, 2020)