Packaging design challenges of the IBM System z10 Enterprise Class server. - Thomas-Michael Winkel; Hubert Harrer; Dierk Kaller; Jochen Supper; Daniel M. Dreps; Kenneth L. Christian; D. Cosmadelis; Tingdong Zhou; Thomas Strach; J. Ludwig; David L. Edwards (IBM J. Res. Dev., 2009)

A 5.2GHz microprocessor chip for the IBM zEnterprise™ system. - James D. Warnock; Y. Chan; William V. Huott; Sean M. Carey; Michael F. Fee; Huajun Wen; Mary Jo Saccamango; Frank Malgioglio; Patrick J. Meaney; Donald W. Plass; Yuen H. Chan; Mark D. Mayo; et al. (ISSCC, 2011)

Electronic packaging of the IBM System z196 enterprise-class server processor cage. - Thomas Strach; Frank E. Bosco; Kenneth L. Christian; Kevin R. Covi; Martin Eckert; Gregory R. Edlund; Roland Frech; Hubert Harrer; Andreas Huber; Dierk Kaller; Martin Kindscher; A. Z. Muszynski; et al. (IBM J. Res. Dev., 2012)

Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System. - James D. Warnock; Yiu-Hing Chan; Sean M. Carey; Huajun Wen; Patrick J. Meaney; Guenter Gerwig; Howard H. Smith; Yuen H. Chan; John Davis; Paul Bunce; Antonio Pelella; Daniel Rodko; et al. (IEEE J. Solid State Circuits, 2012)

5.5GHz system z microprocessor and multi-chip module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; David L. Rude; Ruchir Puri; Sean M. Carey; Gerard Salem; Guenter Mayer; Yiu-Hing Chan; Mark D. Mayo; Adam Jatkowski; Gerald Strevig; et al. (ISSCC, 2013)

Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities. - Ramon Bertran; Alper Buyuktosunoglu; Pradip Bose; Timothy J. Slegel; Gerard Salem; Sean M. Carey; Richard F. Rizzolo; Thomas Strach (MICRO, 2014)

Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; Sean M. Carey; Gerard Salem; Doug Malone; Ruchir Puri; Jeffrey A. Zitz; Adam Jatkowski; Gerald Strevig; Ayan Datta; Anne Gattiker; et al. (IEEE J. Solid State Circuits, 2014)

Electronic packaging of the IBM z13 processor drawer. - Wiren Dale Becker; Hubert Harrer; Andreas Huber; W. L. Brodsky; R. Krabbenhoft; M. A. Cracraft; Dierk Kaller; Gregory R. Edlund; Thomas Strach (IBM J. Res. Dev., 2015)

IBM z13 circuit design and methodology. - James D. Warnock; Christopher J. Berry; Michael H. Wood; Leon J. Sigal; Yun-Chan Myung; Guenter Mayer; Mark D. Mayo; Y. Chan; Frank Malgioglio; Gerald Strevig; Charudhattan Nagarajan; Sean M. Carey; et al. (IBM J. Res. Dev., 2015)

Robust power management in the IBM z13. - Tobias Webel; Preetham M. Lobo; Ramon Bertran; Gerard Salem; Malcolm Allen-Ware; Richard F. Rizzolo; Sean M. Carey; Thomas Strach; Alper Buyuktosunoglu; Charles Lefurgy; Pradip Bose; Ricardo Nigaglioni; et al. (IBM J. Res. Dev., 2015)

26.2 Power supply noise in a 22nm z13™ microprocessor. - Pierce I-Jen Chuang; Christos Vezyrtzis; Divya Pathak; Richard F. Rizzolo; Tobias Webel; Thomas Strach; Otto A. Torreiter; Preetham Lobo; Alper Buyuktosunoglu; Ramon Bertran; Michael S. Floyd; Malcolm S. Ware; et al. (ISSCC, 2017)

Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor. - Christos Vezyrtzis; Thomas Strach; Pierce I-Jen Chuang; Preetham Lobo; Richard F. Rizzolo; Tobias Webel; Pawel Owczarczyk; Alper Buyuktosunoglu; Ramon Bertran; David T. Hui; Susan M. Eickhoff; Michael S. Floyd; et al. (ISSCC, 2018)

IBM z14 design methodology enhancements in the 14-nm technology node. - Christopher J. Berry; James D. Warnock; John Badar; Dean G. Bair; Erwin Behnen; Brian Bell 001; Alper Buyuktosunoglu; Chris Cavitt; Pierce Chuang; Ofer Geva; Dina Hamid; John Isakson; et al. (IBM J. Res. Dev., 2018)

IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems. - Christopher J. Berry; David Wolpert 001; Christos Vezyrtzis; Richard F. Rizzolo; Sean M. Carey; Yaniv Maroz; Hunter F. Shi; Dureseti Chidambarrao; Christian Jacobi 002; Anthony Saporito; Thomas Strach; Alper Buyuktosunoglu; et al. (IEEE J. Solid State Circuits, 2019)

Proactive power management in IBM z15. - Tobias Webel; Preetham M. Lobo; Thomas Strach; Pradeep Bhadravati Parashurama; Srinivas Purushotham; Ramon Bertran; Alper Buyuktosunoglu (IBM J. Res. Dev., 2020)

IBM Telum: a 16-Core 5+ GHz DCM. - Ofer Geva; Christopher J. Berry; Robert J. Sonnelitter; David Wolpert 001; Adam Collura; Thomas Strach; Di Phan; Cédric Lichtenau; Alper Buyuktosunoglu; Hubert Harrer; Jeffrey A. Zitz; Chad Marquart; et al. (ISSCC, 2022)

8.1 Dynamic Guard-Band Features of the IBM zNext System. - Tobias Webel; Phillip J. Restle; Ramon Bertran; Alper Buyuktosunoglu; Sean M. Carey; Alejandro Cook; Karl Anderson; Michael Romain; Thomas Strach; Pradeep Bhadravati Parashurama; Aishwarya Tadkase; Rahman Abber Tahir; et al. (ISSCC, 2025)