A Synchronization Method for Register Traces of Pipelined Processors. - Ralf Dreesen; Thorsten Jungeblut; Michael Thies; Mario Porrmann; Uwe Kastens; Ulrich Rückert 001 (IESS, 2009)

A Framework for the Design Space Exploration of Software-Defined Radio Applications. - Thorsten Jungeblut; Ralf Dreesen; Mario Porrmann; Michael Thies; Ulrich Rückert 001; Uwe Kastens (MOBILIGHT, 2010)

Design Space Exploration for Memory Subsystems of VLIW Architectures. - Thorsten Jungeblut; Gregor Sievers; Mario Porrmann; Ulrich Rückert 001 (NAS, 2010)

Entwurfsraumexploration ressourceneffizienter VLIW-Prozessoren. - Thorsten Jungeblut (2011)

A TCMS-based architecture for GALS NoCs. - Thorsten Jungeblut; Johannes Ax; Mario Porrmann; Ulrich Rückert 001 (ISCAS, 2012)

A 200mV 32b subthreshold processor with adaptive supply voltage control. - Sven Lütkemeier; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (ISSCC, 2012)

Design-space exploration of the configurable 32 bit VLIW processor CoreVA for signal processing applications. - Gregor Sievers; Peter Christ; Julian Einhaus; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (NORCHIP, 2013)

A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. - Sven Lütkemeier; Thorsten Jungeblut; Hans Kristian Otnes Berge; Snorre Aunet; Mario Porrmann; Ulrich Rückert 001 (IEEE J. Solid State Circuits, 2013)

A systematic approach for optimized bypass configurations for application-specific embedded processors. - Thorsten Jungeblut; Boris Hübener; Mario Porrmann; Ulrich Rückert 001 (ACM Trans. Embed. Comput. Syst., 2013)

CoreVA: A Configurable Resource-Efficient VLIW Processor Architecture. - Boris Hübener; Gregor Sievers; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (EUC, 2014)

A communication model and partitioning algorithm for streaming applications for an embedded MPSoC. - Wayne Kelly; Martin Flasskamp; Gregor Sievers; Johannes Ax; Jianing Chen; Christian Klarhorst; Christoph Ragg; Thorsten Jungeblut; Andrew Sorensen (ISSoC, 2014)

A 65 nm standard cell library for ultra low-power applications. - Marten Vohrmann; Saikat Chatterjee; Sven Lütkemeier; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (ECCTD, 2015)

Universelle Echtzeit-Ethernet Architektur zur Integration in rekonfigurierbare Automatisierungssysteme. - Johannes Ax; Aurel Buda; Daniel Schneider; John Harttfel; Lars Dürkop; Thorsten Jungeblut; Jürgen Jasperneite; Andreas Vedral; Ulrich Rückert 001 (GI-Jahrestagung, 2015)

Evaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI. - Gregor Sievers; Johannes Ax; Nils Kucza; Martin Flasskamp; Thorsten Jungeblut; Wayne Kelly; Mario Porrmann; Ulrich Rückert 001 (ISCAS, 2015)

Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. - Gregor Sievers; Julian Daberkow; Johannes Ax; Martin Flasskamp; Wayne Kelly; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (MCSoC, 2015)

System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. - Johannes Ax; Gregor Sievers; Martin Flasskamp; Wayne Kelly; Thorsten Jungeblut; Mario Porrmann (NoCArc@MICRO, 2015)

Evidenzkarten-basierte Sensorfusion zur Umfelderkennung und Interpretation in der Ernte. - Timo Korthals; Andreas Skiba; Thilo Krause; Thorsten Jungeblut (GIL Jahrestagung, 2016)

Performance estimation of streaming applications for hierarchical MPSoCs. - Martin Flasskamp; Gregor Sievers; Johannes Ax; Christian Klarhorst; Thorsten Jungeblut; Wayne Kelly; Michael Thies; Mario Porrmann (RAPIDO@HiPEAC, 2016)

A connected chair as part of a smart home environment. - Marc Hesse; André Frank Krause; Ludwig Vogel; Bhavin Chamadiya; Michael Schilling 003; Thomas Schack; Thorsten Jungeblut (BSN, 2017)

Design-space exploration of ultra-low power CMOS logic gates in a 28 nm FD-SOI technology. - Marten Vohrmann; Philippe Geisler; Thorsten Jungeblut; Ulrich Rückert 001 (ECCTD, 2017)

Comparing Synchronous, Mesochronous and Asynchronous NoCs for GALS Based MPSoCs. - Johannes Ax; Nils Kucza; Marten Vohrmann; Thorsten Jungeblut; Mario Porrmann; Ulrich Rückert 001 (MCSoC, 2017)

LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing. - Adrián Cristal; Osman S. Unsal; Xavier Martorell; Paul Carpenter; Raúl de la Cruz; Leonardo Bautista-Gomez; Daniel Jiménez-González; Carlos Álvarez 001; Behzad Salami 001; Sergi Madonar; Miquel Pericàs; Pedro Trancoso; et al. (CF, 2018)

Scalable Mapping of Streaming Applications onto MPSoCs Using Optimistic Mixed Integer Linear Programming. - Neela Gayen; Johannes Ax; Martin Flasskamp; Christian Klarhorst; Thorsten Jungeblut; Maolin Tang; Wayne Kelly (PDP, 2018)

LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing. - Adrián Cristal; Osman S. Unsal; Xavier Martorell; Paul Carpenter; Raúl de la Cruz; Leonardo Bautista-Gomez; Daniel Jiménez-González; Carlos Álvarez 001; Behzad Salami 001; Sergi Madonar; Miquel Pericàs; Pedro Trancoso; et al. (SAMOS, 2018)

Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems. - Christian Klarhorst; Martin Flasskamp; Johannes Ax; Thorsten Jungeblut; Wayne Kelly; Mario Porrmann; Ulrich Rückert 001 (CoRR, 2018)

CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories. - Johannes Ax; Gregor Sievers; Julian Daberkow; Martin Flasskamp; Marten Vohrmann; Thorsten Jungeblut; Wayne Kelly; Mario Porrmann; Ulrich Rückert 001 (IEEE Trans. Parallel Distributed Syst., 2018)

Towards an SSVEP-BCI Controlled Smart Home. - Michael Adams 002; Sadok Ben-Salem; Zahidul Islam; Arne Vogelsang; Thorsten Jungeblut; Ulrich Rückert 001; Ivan Volosyak; Mihaly Benda; Abdul Saboor; André Frank Krause; Aya Rezeika; Felix Gembler; et al. (SMC, 2019)

SNNs Model Analyzing and Visualizing Experimentation Using RAVSim. - Sanaullah; Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (EANN, 2022)

A Framework for Learning Event Sequences and Explaining Detected Anomalies in a Smart Home Environment. - Justin Baudisch; Birte Richter; Thorsten Jungeblut (Künstliche Intell., 2022)

Streamlined Training of GCN for Node Classification with Automatic Loss Function and Optimizer Selection. - Sanaullah; Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (EANN, 2023)

Digit Recognition Using Spiking Neural Networks on FPGA. - Shamini Koravuna; Sanaullah; Thorsten Jungeblut; Ulrich Rückert 001 (IWANN (1), 2023)

Exploring spiking neural networks: a comprehensive analysis of mathematical models and applications. - Sanaullah; Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (Frontiers Comput. Neurosci., 2023)

Evaluation of Spiking Neural Nets-Based Image Classification Using the Runtime Simulator RAVSim. - Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (Int. J. Neural Syst., 2023)

A Spike Vision Approach for Multi-object Detection and Generating Dataset Using Multi-core Architecture on Edge Device. - Sanaullah; Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (EANN, 2024)

Improving Transfer Learning and Domain Adaptation in Smart Homes: The Role of Dynamic Domain Adaptation Layer. - Hasina Attaullah; Anum Kiani; Thorsten Jungeblut (FIT, 2024)

Poster: Selection of Optimal Neural Model using Spiking Neural Network for Edge Computing*. - Sanaullah; Kaushik Roy; Ulrich Rückert 001; Thorsten Jungeblut (ICDCS, 2024)

The Next-Gen Interactive Runtime Simulator for Neural Network Programming. - Sanaullah; Hasina Attaullah; Thorsten Jungeblut (Programming, 2024)

Encryption Techniques for Privacy-Preserving CNN Models: Performance and Practicality in Urban AI Applications. - Sanaullah; Hasina Attaullah; Thorsten Jungeblut (UrbanAI@SIGSPATIAL, 2024)

Design-Space Exploration of SNN Models using Application-Specific Multi-Core Architectures. - Sanaullah; Shamini Koravuna; Ulrich Rückert 001; Thorsten Jungeblut (CoRR, 2024)

A Hybrid Spiking-Convolutional Neural Network Approach for Advancing Machine Learning Models. - Sanaullah; Kaushik Roy; Ulrich Rückert 001; Thorsten Jungeblut (CoRR, 2024)

Deep&Wide: Achieving Area Efficiency in Scalable Approximate Accelerators. - Farjana Jalil; Muhammad Awais 009; Qazi Arbab Ahmed; Hassan Ghasemzadeh Mohammadi; Thorsten Jungeblut; Marco Platzner (DSN-W, 2025)

RAVSim v2.0: Enhanced visualization and comparative analysis for neural network models. - Sanaullah; Axel Schneider; Joachim Waßmuth; Ulrich Rückert 001; Thorsten Jungeblut (SoftwareX, 2025)

Corrigendum to "RAVSim v2.0: Enhanced visualization and comparative analysis for neural network models" [SoftwareX volume 29, February 2025 Article Number: 102006]. - Sanaullah; Axel Schneider; Joachim Waßmuth; Ulrich Rückert 001; Thorsten Jungeblut (SoftwareX, 2025)