A VLSI architecture for a universal high-speed multirate FIR digital filter with selectable power-of-two decimation/interpolation ratios. - Henry Samueli; Thu-ji Lin (ICASSP, 1991)

A 200-MHz CMOS x/sin(x) digital filter for compensating D/A converter frequency response distortion. - Thu-ji Lin; Henry Samulei (IEEE J. Solid State Circuits, 1991)

A 300 MHz digital double-sideband to single-sideband converter in 1 μm CMOS. - Robert A. Hawley; Thu-ji Lin; Henry Samueli (IEEE J. Solid State Circuits, 1995)

Design techniques for silicon compiler implementations of high-speed FIR digital filters. - Robert A. Hawley; Bennett C. Wong; Thu-ji Lin; Joe L. Laskowski; Henry Samueli (IEEE J. Solid State Circuits, 1996)