Demo: FPGA implementation of an IEEE802.15.4g MR-OFDM baseband modem for smart metering utility networks. - Augusto F. R. Queiroz; Gabriel S. da Silva; Cesar G. Chaves; Tiago D. Perez; Daniel G. Urdanetta; Denise C. Alves; Maique C. Garcia; Eduardo R. de Lima (GCCE, 2015)

Architecture design and implementation of key components of an OFDM transceiver for IEEE 802.15.4g. - Denise C. Alves; Gabriel S. da Silva; Eduardo R. de Lima; Cesar G. Chaves; Daniel Urdaneta; Tiago D. Perez; Maique C. Garcia (ISCAS, 2016)

A Survey on Split Manufacturing: Attacks, Defenses, and Challenges. - Tiago D. Perez; Samuel Pagliarini (IEEE Access, 2020)

From FPGAs to Obfuscated eASICs: Design and Security Trade-offs. - Zain Ul Abideen 002; Tiago Diadami Perez; Samuel Pagliarini (AsianHOST, 2021)

Side-Channel Trojan Insertion - a Practical Foundry-Side Attack via ECO. - Tiago D. Perez; Malik Imran; Pablo Vaz; Samuel Pagliarini (ISCAS, 2021)

Hardware Trojan Insertion in Finalized Layouts: a Silicon Demonstration. - Tiago D. Perez; Samuel Pagliarini (CoRR, 2021)

A Side-Channel Hardware Trojan in 65nm CMOS with 2μW precision and Multi-bit Leakage Capability. - Tiago D. Perez; Samuel Pagliarini (ASP-DAC, 2022)

G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators. - Tiago D. Perez; Marcio M. Gonçalves; Leonardo Gobatto; Marcelo Brandalero; José Rodrigo Azambuja; Samuel Pagliarini (DATE, 2022)

A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts. - Alexander Hepp; Tiago D. Perez; Samuel Pagliarini; Georg Sigl (ICCAD, 2022)

A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs. - Zain Ul Abideen 002; Tiago Diadami Perez; Mayler G. A. Martins; Samuel Pagliarini (CoRR, 2022)

SALSy: Security-Aware Layout Synthesis. - Mohammad Eslami; Tiago D. Perez; Samuel Pagliarini (CoRR, 2023)

Hardware Trojan Insertion in Finalized Layouts: From Methodology to a Silicon Demonstration. - Tiago D. Perez; Samuel Pagliarini (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A Security-Aware and LUT-Based CAD Flow for the Physical Synthesis of hASICs. - Zain Ul Abideen 002; Tiago Diadami Perez; Mayler G. A. Martins; Samuel Pagliarini (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Impact of Orientation on the Bias of SRAM-Based PUFs. - Zain Ul Abideen 002; Rui Wang; Tiago Diadami Perez; Geert Jan Schrijen; Samuel Pagliarini (IEEE Des. Test, 2024)