Tiago Dias

According to our database1, Tiago Dias authored at least 20 papers between 2003 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Predictive analytics in the petrochemical industry: Research Octane Number (RON) forecasting and analysis in an industrial catalytic reforming unit.
Comput. Chem. Eng., 2020

Adaptive Integration of IoT with Informatics Systems for Collaborative Industry: The SITL-IoT Case.
Proceedings of the Collaborative Networks and Digital Transformation, 2019

High performance IP core for HEVC quantization.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs.
EURASIP J. Adv. Signal Process., 2014

Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems.
Int. J. Parallel Program., 2013

Gesture interaction system for social web applications on smart TVs.
Proceedings of the Open research Areas in Information Retrieval, 2013

High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

High Performance Unified Architecture for Forward and Inverse Quantization in H.264/AVC.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs.
IEEE Trans. Consumer Electron., 2011

High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

H.264/AVC framework for multi-core embedded video encoders.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Integrated accelerator architecture for DNA sequences alignment with enhanced traceback phase.
Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Reconfigurable architectures and processors for real-time video motion estimation.
J. Real Time Image Process., 2007

Adaptive Motion Estimation Processor for Autonomous Video Devices.
EURASIP J. Embed. Syst., 2007

Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Application Specific Instruction Set Processor for Adaptive Video Motion Estimation.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Efficient VLSI Architecture for Real-Time Motion Estimation in Advanced Video Coding.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003