An 84dB-SNDR Low-OSR 4th-Order Noise-Shaping SAR with an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique. - Tzuhan Wang; Tian Xie 006; Zhe Liu 031; Shaolan Li (ISSCC, 2022)

An 84-dB-SNDR Low-OSR Fourth-Order Noise-Shaping SAR With an FIA-Assisted EF-CRFF Structure and Noise-Mitigated Push-Pull Buffer-in-Loop Technique. - Tian Xie 006; Tzu-Han Wang; Zhe Liu 031; Shaolan Li (IEEE J. Solid State Circuits, 2022)

An 82dB-SNDR Input-Driving-Relaxed Noise-Shaping SAR with Amplifier-Reused In-Loop Buffering and NTF Leakage Reshaping. - Tian Xie 006; Ken Li; Tzu-Han Wang; Wei-En Lee; Engin Esen; Dong Suk Kang; Shaolan Li (CICC, 2024)

A 95.9-dB SNDR 10-kHz BW 3rd-Order VCO-Based CT ΔΣ Modulator Using a Phase-Time Two-Step Quantizer. - Ken Li; Wei-En Lee; Xitie Zhang; Tian Xie 006; Tzu-Han Wang; Visvesh Sathe 001; Shaolan Li (CICC, 2025)

VSAGE: An End-to-End Automated VCO-Based ΔΣ ADC Generator. - Ken Li; Tian Xie 006; Tzu-Han Wang; Shaolan Li (IEEE Trans. Very Large Scale Integr. Syst., 2025)