An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. - Xiaodong Wang; Tianchen Gu; Changhao Yan; Xiulong Wu; Fan Yang 001; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (DAC, 2020)

HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. - Tianchen Gu; Ruiyu Lyu; Zhaori Bi; Changhao Yan; Fan Yang 001; Dian Zhou; Tao Cui; Xin Liu 001; Zaikun Zhang; Xuan Zeng 001 (DAC, 2024)

tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. - Tianchen Gu; Jiaqi Wang; Zhaori Bi; Changhao Yan; Fan Yang 001; Yajie Qin; Tao Cui; Xuan Zeng 001 (DATE, 2024)

Exploring High-dimensional Search Space via Voronoi Graph Traversing. - Aidong Zhao; Xuyang Zhao; Tianchen Gu; Zhaori Bi; Xinwei Sun 001; Changhao Yan; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (UAI, 2024)

BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. - Tianchen Gu; Wangzhen Li; Aidong Zhao; Zhaori Bi; Xudong Li; Fan Yang 001; Changhao Yan; Wenchuang Walter Hu; Dian Zhou; Tao Cui; Xin Liu 001; Zaikun Zhang; et al. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing. - Aidong Zhao; Tianchen Gu; Zhaori Bi; Fan Yang 001; Changhao Yan; Xuan Zeng 001; Zixiao Lin; Wenchuang Walter Hu; Dian Zhou (ACM Trans. Design Autom. Electr. Syst., 2024)